Inventor
MAZURE-ESPEJO CARLOS
DE21 patents
⚠️ This page may combine multiple inventors who share the name “MAZURE-ESPEJO CARLOS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INFINEON TECHNOLOGIES AG
11 patentsUS6468896B2Oct 22, 2002
Method of fabricating semiconductor components
INFINEON TECHNOLOGIES AG29 citations92
US6844581B2Jan 18, 2005
Storage capacitor and associated contact-making structure and a method for fabricating the storage capacitor and the contact-making structure
INFINEON TECHNOLOGIES AG12 citations83
US6156673ADec 5, 2000
Process for producing a ceramic layer
INFINEON TECHNOLOGIES AG17 citations83
US6197633B1Mar 6, 2001
Method for the production of an integrated semiconductor memory configuration
INFINEON TECHNOLOGIES AG10 citations74
US6168988B1Jan 2, 2001
Method for producing barrier-free semiconductor memory configurations
INFINEON TECHNOLOGIES AG7 citations74
US6136659AOct 24, 2000
Production process for a capacitor electrode formed of a platinum metal
INFINEON TECHNOLOGIES AG12 citations74
US6414300B1Jul 2, 2002
Circuit with a sensor and non-volatile memory having a ferroelectric dielectric capacitor
INFINEON TECHNOLOGIES AG11 citations73
US6627934B1Sep 30, 2003
Integrated semiconductor memory configuration with a buried plate electrode and method for its fabrication
INFINEON TECHNOLOGIES AG4 citations63
US6316802B1Nov 13, 2001
Easy to manufacture integrated semiconductor memory configuration with platinum electrodes
INFINEON TECHNOLOGIES AG5 citations63
US6537900B2Mar 25, 2003
Method for patterning a metal or metal silicide layer and a capacitor structure fabricated by the method
INFINEON TECHNOLOGIES AG0 citations52
US6958501B2Oct 25, 2005
Contact-making structure for a ferroelectric storage capacitor and method for fabricating the structure
INFINEON TECHNOLOGIES AG1 citations51
SIEMENS AG
10 patentsUS6043529AMar 28, 2000
Semiconductor configuration with a protected barrier for a stacked cell
SIEMENS AG72 citations96
US6100187AAug 8, 2000
Method of producing a barrier layer in a semiconductor body
SIEMENS AG22 citations92
US6091625AJul 18, 2000
Ferroelectric memory and method for preventing aging in a memory cell
SIEMENS AG29 citations90
US6337239B1Jan 8, 2002
Layer configuration with a material layer and a diffusion barrier which blocks diffusing material components and process for producing a diffusion barrier
SIEMENS AG14 citations84
US6037256AMar 14, 2000
Method for producing a noble metal-containing structure on a substrate, and semiconductor component having such a noble metal-containing structure
SIEMENS AG15 citations73
US6004856ADec 21, 1999
Manufacturing process for a raised capacitor electrode
SIEMENS AG14 citations73
US6097050AAug 1, 2000
Memory configuration with self-aligning non-integrated capacitor configuration
SIEMENS AG6 citations63
US6605505B2Aug 12, 2003
Process for producing an integrated semiconductor memory configuration
SIEMENS AG2 citations62
US6297526B1Oct 2, 2001
Process for producing barrier-free semiconductor memory configurations
SIEMENS AG3 citations62
US6126998AOct 3, 2000
Process for producing a ceramic layer containing Bi
SIEMENS AG4 citations62