P

Inventor

LIAO WEI-MING

TW33 patents
⚠️ This page may combine multiple inventors who share the name “LIAO WEI-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NANYA TECHNOLOGY CORP

26 patents
US11315930B2Apr 26, 2022

Semiconductor structure and method of manufacturing the same

NANYA TECHNOLOGY CORP7 citations85
US11101273B1Aug 24, 2021

Semiconductor structure having word line disposed over portion of an oxide-free dielectric material in the non-active region

NANYA TECHNOLOGY CORP8 citations83
US11482419B2Oct 25, 2022

Method for preparing transistor device

NANYA TECHNOLOGY CORP2 citations73
US10818800B2Oct 27, 2020

Semiconductor structure and method for preparing the same

NANYA TECHNOLOGY CORP5 citations73
US10937886B2Mar 2, 2021

Semiconductor device with negative capacitance material in buried channel

NANYA TECHNOLOGY CORP3 citations72
US10242978B1Mar 26, 2019

Semiconductor electrostatic discharge protection device

NANYA TECHNOLOGY CORP2 citations71
US10763212B1Sep 1, 2020

Semiconductor structure

NANYA TECHNOLOGY CORP6 citations70
US9343547B2May 17, 2016

Method for fabricating a recessed channel access transistor device

NANYA TECHNOLOGY CORP2 citations63
US11659707B2May 23, 2023

Method of manufacturing a semiconductor structure

NANYA TECHNOLOGY CORP0 citations62
US11488964B2Nov 1, 2022

Method of manufacturing semiconductor structure having word line disposed over portion of an oxide-free dielectric material in the non-active region

NANYA TECHNOLOGY CORP0 citations62
US10903080B2Jan 26, 2021

Transistor device and method for preparing the same

NANYA TECHNOLOGY CORP0 citations62
US10825898B2Nov 3, 2020

Semiconductor layout structure including asymmetrical channel region

NANYA TECHNOLOGY CORP1 citations62
US10559661B2Feb 11, 2020

Transistor device and semiconductor layout structure including asymmetrical channel region

NANYA TECHNOLOGY CORP1 citations62
US10461191B2Oct 29, 2019

Semiconductor device with undercutted-gate and method of fabricating the same

NANYA TECHNOLOGY CORP1 citations62
US10446556B2Oct 15, 2019

Method for preparing a semiconductor memory structure

NANYA TECHNOLOGY CORP1 citations62
US12538478B2Jan 27, 2026

Semiconductor memory device and manufacturing method thereof

NANYA TECHNOLOGY CORP0 citations59
US12107002B2Oct 1, 2024

Manufacturing method of semiconductor structure

NANYA TECHNOLOGY CORP0 citations59
US11935780B2Mar 19, 2024

Semiconductor structure and manufacturing method thereof

NANYA TECHNOLOGY CORP0 citations59
US9368494B2Jun 14, 2016

Semiconductor device and method of manufacturing the same

NANYA TECHNOLOGY CORP0 citations52
US7642142B2Jan 5, 2010

Method for manufacturing a flash memory device with cavities in upper portions of conductors

NANYA TECHNOLOGY CORP0 citations52
US10825931B2Nov 3, 2020

Semiconductor device with undercutted-gate and method of fabricating the same

NANYA TECHNOLOGY CORP0 citations51
US10381351B2Aug 13, 2019

Transistor structure and semiconductor layout structure

NANYA TECHNOLOGY CORP0 citations51
US7956403B2Jun 7, 2011

Two-bit flash memory

NANYA TECHNOLOGY CORP0 citations51
US10559560B2Feb 11, 2020

Semiconductor electrostatic discharge protection device

NANYA TECHNOLOGY CORP0 citations50
US7667262B2Feb 23, 2010

Two bit U-shaped memory structure and method of making the same

NANYA TECHNOLOGY CORP0 citations50
US9985105B2May 29, 2018

Method of manufacturing a PMOS transistor comprising a dual work function metal gate

NANYA TECHNOLOGY CORP0 citations38

LIAO WEI-MING

2 patents

SHANGHAI SILICON DRIVER SEMICONDUCTOR TECH CO LTD

2 patents

MICRON TECHNOLOGY INC

1 patent

WU TIEH-CHIANG

1 patent

WANG KUO CHEN

1 patent