Inventor
RAUSCH WERNER A
US28 patents
⚠️ This page may combine multiple inventors who share the name “RAUSCH WERNER A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
24 patentsUS10068184B1Sep 4, 2018
Vertical superconducting capacitors for transmon qubits
IBM43 citations98
US6939751B2Sep 6, 2005
Method and manufacture of thin silicon on insulator (SOI) with recessed channel
IBM98 citations98
US7071103B2Jul 4, 2006
Chemical treatment to retard diffusion in a semiconductor overlayer
IBM120 citations97
US6624459B1Sep 23, 2003
Silicon on insulator field effect transistors having shared body contact
IBM103 citations97
US7135724B2Nov 14, 2006
Structure and method for making strained channel field effect transistor using sacrificial spacer
IBM47 citations96
US6930030B2Aug 16, 2005
Method of forming an electronic device on a recess in the surface of a thin film of silicon etched to a precise thickness
IBM57 citations95
US6429482B1Aug 6, 2002
Halo-free non-rectifying contact on chip with halo source/drain diffusion
IBM46 citations95
US7176481B2Feb 13, 2007
In situ doped embedded sige extension and source/drain for enhanced PFET performance
IBM52 citations92
US6887798B2May 3, 2005
STI stress modification by nitrogen plasma treatment for improving performance in small width devices
IBM16 citations92
US6815282B2Nov 9, 2004
Silicon on insulator field effect transistor having shared body contact
IBM36 citations92
US7479688B2Jan 20, 2009
STI stress modification by nitrogen plasma treatment for improving performance in small width devices
IBM11 citations84
US7700425B2Apr 20, 2010
Raised source drain mosfet with amorphous notched gate cap layer with notch sidewalls passivated and filled with dielectric plug
IBM8 citations83
US7645656B2Jan 12, 2010
Structure and method for making strained channel field effect transistor using sacrificial spacer
IBM7 citations74
US7402870B2Jul 22, 2008
Ultra shallow junction formation by epitaxial interface limited diffusion
IBM5 citations74
US10839133B1Nov 17, 2020
Circuit layout similarity metric for semiconductor testsite coverage
IBM2 citations73
US10552758B2Feb 4, 2020
Vertical superconducting capacitors for transmon qubits
IBM1 citations73
US6750109B2Jun 15, 2004
Halo-free non-rectifying contact on chip with halo source/drain diffusion
IBM11 citations72
US9029862B2May 12, 2015
Low resistance embedded strap for a trench capacitor
IBM2 citations63
US7880238B2Feb 1, 2011
2-T SRAM cell structure and method
IBM5 citations63
US8017483B2Sep 13, 2011
Method of creating asymmetric field-effect-transistors
IBM5 citations62
US7790541B2Sep 7, 2010
Method and structure for forming multiple self-aligned gate stacks for logic devices
IBM3 citations60
US10445651B2Oct 15, 2019
Vertical superconducting capacitors for transmon qubits
IBM0 citations52
US9812394B2Nov 7, 2017
Faceted structure formed by self-limiting etch
IBM1 citations52
US7816237B2Oct 19, 2010
Ultra shallow junction formation by epitaxial interface limited diffusion
IBM0 citations52