Inventor
PILLING DAVID J
US28 patents
⚠️ This page may combine multiple inventors who share the name “PILLING DAVID J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEGRATED DEVICE TECH
26 patentsUS7594149B2Sep 22, 2009
In-situ monitor of process and device parameters in integrated circuits
INTEGRATED DEVICE TECH66 citations98
US6130563AOct 10, 2000
Output driver circuit for high speed digital signal transmission
INTEGRATED DEVICE TECH114 citations95
US6856558B1Feb 15, 2005
Integrated circuit devices having high precision digital delay lines therein
INTEGRATED DEVICE TECH18 citations92
US6573775B2Jun 3, 2003
Integrated circuit flip-flops that utilize master and slave latched sense amplifiers
INTEGRATED DEVICE TECH25 citations92
US5838624ANov 17, 1998
Circuits for improving the reliability of antifuses in integrated circuits
INTEGRATED DEVICE TECH30 citations92
US5680360AOct 21, 1997
Circuits for improving the reliablity of antifuses in integrated circuits
INTEGRATED DEVICE TECH20 citations92
US5514980AMay 7, 1996
High resolution circuit and method for sensing antifuses
INTEGRATED DEVICE TECH29 citations92
US5325335AJun 28, 1994
Memories and amplifiers suitable for low voltage power supplies
INTEGRATED DEVICE TECH45 citations92
US5228106AJul 13, 1993
Track-and-regenerate amplifiers and memories using such amplifiers
INTEGRATED DEVICE TECH39 citations92
US7554379B2Jun 30, 2009
High-speed, low-power level shifter for mixed signal-level environments
INTEGRATED DEVICE TECH20 citations91
US5949127ASep 7, 1999
Electrically programmable interlevel fusible link for integrated circuits
INTEGRATED DEVICE TECH18 citations89
US6944070B1Sep 13, 2005
Integrated circuit devices having high precision digital delay lines therein
INTEGRATED DEVICE TECH12 citations84
US6700425B1Mar 2, 2004
Multi-phase clock generators that utilize differential signals to achieve reduced setup and hold times
INTEGRATED DEVICE TECH17 citations84
US7583087B2Sep 1, 2009
In-situ monitor of process and device parameters in integrated circuits
INTEGRATED DEVICE TECH8 citations82
US5608685AMar 4, 1997
Adjacent row shift redundancy circuit having signal restorer coupled to programmable links and a method thereof
INTEGRATED DEVICE TECH12 citations74
US5508969AApr 16, 1996
Adjacent row shift redundancy circuit having signal restorer coupled to programmable links
INTEGRATED DEVICE TECH8 citations74
US5818778AOct 6, 1998
Redundancy circuit for programmable integrated circuits
INTEGRATED DEVICE TECH10 citations73
US5808343ASep 15, 1998
Input structure for digital integrated circuits
INTEGRATED DEVICE TECH10 citations73
US5677888AOct 14, 1997
Redundancy circuit for programmable integrated circuits
INTEGRATED DEVICE TECH11 citations73
US5260902ANov 9, 1993
Efficient redundancy method for RAM circuit
INTEGRATED DEVICE TECH11 citations73
US5199002AMar 30, 1993
SRAM-address-change-detection circuit
INTEGRATED DEVICE TECH10 citations68
US5568444AOct 22, 1996
Adjacent row shift redundancy circuit having signal restorer coupled to programmable links
INTEGRATED DEVICE TECH3 citations63
US7518842B2Apr 14, 2009
Circuits and methods that attenuate coupled noise
INTEGRATED DEVICE TECH4 citations62
US7203126B2Apr 10, 2007
Integrated circuit systems and devices having high precision digital delay lines therein
INTEGRATED DEVICE TECH4 citations62
US5950233ASep 7, 1999
Interleaved burst address counter with reduced delay between rising clock edge and burst address transfer to memory
INTEGRATED DEVICE TECH4 citations62
US6333524B1Dec 25, 2001
Electrically programmable interlevel fusible link for integrated circuits
INTEGRATED DEVICE TECH0 citations49