Inventor

ONG JENNY SHIO YIN

MY45 patents

Patents

45 patents

US11527463B2Dec 13, 2022

Stiffener-integrated interconnect bypasses for chip-package apparatus and methods of assembling same

INTEL CORP2 citations73

US10964677B2Mar 30, 2021

Electronic packages with stacked sitffeners and methods of assembling same

INTEL CORP4 citations73

US10910325B2Feb 2, 2021

Integrated circuit packages with conductive element having cavities housing electrically connected embedded components

INTEL CORP3 citations73

US10396047B2Aug 27, 2019

Semiconductor package with package components disposed on a package substrate within a footprint of a die

INTEL CORP2 citations73

US12599013B2Apr 7, 2026

Semiconductor packages for stacked memory-on-package (SMOP) and methods of manufacturing the same

INTEL CORP0 citations62

US12328816B2Jun 10, 2025

Asymmetrical laminated circuit boards for improved electrical performance

INTEL CORP0 citations62

US12256487B2Mar 18, 2025

Hybrid boards with embedded planes

INTEL CORP0 citations62

US12142570B2Nov 12, 2024

Composite bridge die-to-die interconnects for integrated-circuit packages

INTEL CORP0 citations62

US12002747B2Jun 4, 2024

Integrated bridge for die-to-die interconnects

INTEL CORP0 citations62

US11955431B2Apr 9, 2024

Interposer structures and methods for 2.5D and 3D packaging

INTEL CORP0 citations62

US11887940B2Jan 30, 2024

Integrated circuit packages with conductive element having cavities housing electrically connected embedded components

INTEL CORP0 citations62

US11676910B2Jun 13, 2023

Embedded reference layers for semiconductor package substrates

INTEL CORP0 citations62

US11574877B2Feb 7, 2023

Semiconductor miniaturization through component placement on stepped stiffener

INTEL CORP1 citations62

US11562954B2Jan 24, 2023

Frame-array interconnects for integrated-circuit packages

INTEL CORP0 citations62

US11521943B2Dec 6, 2022

Method of forming a capacitive loop substrate assembly

INTEL CORP0 citations62

US11521932B2Dec 6, 2022

Composite bridge die-to-die interconnects for integrated-circuit packages

INTEL CORP1 citations62

US11508650B2Nov 22, 2022

Interposer for hybrid interconnect geometry

INTEL CORP0 citations62

US11462488B2Oct 4, 2022

Substrate cores for warpage control

INTEL CORP0 citations62

US11430764B2Aug 30, 2022

Overhang bridge interconnect

INTEL CORP0 citations62

US11342289B2May 24, 2022

Vertical power plane module for semiconductor packages

INTEL CORP0 citations62

US11289427B2Mar 29, 2022

Multi-faceted integrated-circuit dice and packages

INTEL CORP0 citations62

US11284518B1Mar 22, 2022

Semiconductor package with co-axial ball-grid-array

INTEL CORP0 citations62

US11227841B2Jan 18, 2022

Stiffener build-up layer package

INTEL CORP0 citations62

US11195801B2Dec 7, 2021

Embedded reference layers for semiconductor package substrates

INTEL CORP1 citations62

US11037874B2Jun 15, 2021

Plane-less voltage reference interconnects

INTEL CORP0 citations62

US11031359B2Jun 8, 2021

Capacitor loop structure

INTEL CORP0 citations62

US10903155B2Jan 26, 2021

Vertical modular stiffeners for stacked multi-device packages

INTEL CORP0 citations62

US12191281B2Jan 7, 2025

Multi-chip package with recessed memory

INTEL CORP0 citations61

US11476198B2Oct 18, 2022

Multi-level components for integrated-circuit packages

INTEL CORP0 citations58

US12500175B2Dec 16, 2025

Integrated bridge frame for package substrate

INTEL CORP0 citations52

US12218064B2Feb 4, 2025

Molded silicon interconnects in bridges for integrated-circuit packages

INTEL CORP0 citations52

US12183722B2Dec 31, 2024

Molded interconnects in bridges for integrated-circuit packages

INTEL CORP0 citations52

US11527467B2Dec 13, 2022

Multi-chip package with extended frame

INTEL CORP0 citations52

US11527485B2Dec 13, 2022

Electrical shield for stacked heterogeneous device integration

INTEL CORP0 citations52

US11508660B2Nov 22, 2022

Molded power delivery interconnect module for improved Imax and power integrity

INTEL CORP0 citations52

US11205622B2Dec 21, 2021

Stiffener shield for device integration

INTEL CORP0 citations52

US10985147B2Apr 20, 2021

Capacitors embedded in stiffeners for small form-factor and methods of assembling same

INTEL CORP0 citations52

US10504854B2Dec 10, 2019

Through-stiffener inerconnects for package-on-package apparatus and methods of assembling same

INTEL CORP0 citations52

US10163777B2Dec 25, 2018

Interconnects for semiconductor packages

INTEL CORP0 citations51

US10492299B2Nov 26, 2019

Electronic assembly that includes a substrate bridge

INTEL CORP0 citations50

US9159714B2Oct 13, 2015

Package on wide I/O silicon

INTEL CORP0 citations41

ONG JENNY SHIO YIN

Patents

Hybrid ball grid array package for high speed interconnects

Semiconductor package with hybrid through-silicon-vias

Integrated bridge for die-to-die interconnects

Package with wall-side capacitors

Stiffener-integrated interconnect bypasses for chip-package apparatus and methods of assembling same

Electronic packages with stacked sitffeners and methods of assembling same

Integrated circuit packages with conductive element having cavities housing electrically connected embedded components

Semiconductor package with package components disposed on a package substrate within a footprint of a die

Semiconductor packages for stacked memory-on-package (SMOP) and methods of manufacturing the same

Asymmetrical laminated circuit boards for improved electrical performance

Hybrid boards with embedded planes

Composite bridge die-to-die interconnects for integrated-circuit packages

Integrated bridge for die-to-die interconnects

Interposer structures and methods for 2.5D and 3D packaging

Integrated circuit packages with conductive element having cavities housing electrically connected embedded components

Embedded reference layers for semiconductor package substrates

Semiconductor miniaturization through component placement on stepped stiffener

Frame-array interconnects for integrated-circuit packages

Method of forming a capacitive loop substrate assembly

Composite bridge die-to-die interconnects for integrated-circuit packages

Interposer for hybrid interconnect geometry

Substrate cores for warpage control

Overhang bridge interconnect

Vertical power plane module for semiconductor packages

Multi-faceted integrated-circuit dice and packages

Semiconductor package with co-axial ball-grid-array

Stiffener build-up layer package

Embedded reference layers for semiconductor package substrates

Plane-less voltage reference interconnects

Capacitor loop structure

Vertical modular stiffeners for stacked multi-device packages

Multi-chip package with recessed memory

Multi-level components for integrated-circuit packages

Integrated bridge frame for package substrate

Molded silicon interconnects in bridges for integrated-circuit packages

Molded interconnects in bridges for integrated-circuit packages

Multi-chip package with extended frame

Electrical shield for stacked heterogeneous device integration

Molded power delivery interconnect module for improved Imax and power integrity

Stiffener shield for device integration

Capacitors embedded in stiffeners for small form-factor and methods of assembling same

Through-stiffener inerconnects for package-on-package apparatus and methods of assembling same

Interconnects for semiconductor packages

Electronic assembly that includes a substrate bridge

Package on wide I/O silicon