Inventor
LO TIN-CHEE
US27 patents
Patents
27 patentsUS5659551AAug 19, 1997
Programmable computer system element with built-in self test method and apparatus for repair during power-on
IBM117 citations97
US5488319AJan 30, 1996
Latch interface for self-reset logic
IBM42 citations96
US7058866B2Jun 6, 2006
Method and system for an on-chip AC self-test controller
IBM43 citations95
US5661732AAug 26, 1997
Programmable ABIST microprocessor for testing arrays with two logical views
IBM64 citations95
US5058115AOct 15, 1991
Fault tolerant computer memory systems and components employing dual level error correction and detection with lock-up feature
IBM79 citations95
US5970052AOct 19, 1999
Method for dynamic bandwidth testing
IBM97 citations94
US6594196B2Jul 15, 2003
Multi-port memory device and system for addressing the multi-port memory device
IBM34 citations92
US5805789ASep 8, 1998
Programmable computer system element with built-in self test method and apparatus for repair during power-on
IBM49 citations92
US5138705AAug 11, 1992
Chip organization for an extendable memory structure providing busless internal page transfers
IBM27 citations92
US4686392AAug 11, 1987
Multi-functional differential cascode voltage switch logic
IBM43 citations92
US5359722AOct 25, 1994
Method for shortening memory fetch time relative to memory store time and controlling recovery in a DRAM
IBM64 citations91
US6839861B2Jan 4, 2005
Method and system for selecting data sampling phase for self timed interface logic
IBM39 citations89
US5907671AMay 25, 1999
Fault tolerant system based on voting
IBM39 citations89
US5543735AAug 6, 1996
Method of controlling signal transfer between self-resetting logic circuits
IBM17 citations82
US6910165B2Jun 21, 2005
Digital random noise generator
IBM7 citations74
US5565808AOct 15, 1996
Latch control circuit
IBM6 citations74
US5479640ADec 26, 1995
Memory access system including a memory controller with memory redrive circuitry
IBM13 citations69
US7587543B2Sep 8, 2009
Apparatus, method and computer program product for dynamic arbitration control
IBM7 citations68
US5822338AOct 13, 1998
ECC-compare path of cache directory logic improvements
IBM2 citations63
US7275202B2Sep 25, 2007
Method, system and program product for autonomous error recovery for memory devices
IBM2 citations62
US7430698B2Sep 30, 2008
Method and system for an on-chip AC self-test controller
IBM1 citations61
US6931492B2Aug 16, 2005
Method for using a portion of the system cache as a trace array
IBM5 citations61
US7076676B2Jul 11, 2006
Sequence alignment logic for generating output representing the slowest from group write slaves response inputs
IBM2 citations58
US6836840B2Dec 28, 2004
Slaves with identification and selection stages for group write
IBM4 citations58
US7739557B2Jun 15, 2010
Method, system and program product for autonomous error recovery for memory devices
IBM1 citations52
US7596734B2Sep 29, 2009
On-Chip AC self-test controller
IBM0 citations51
US7167952B2Jan 23, 2007
Method and system for performing a memory-mode write to cache
IBM0 citations35