Inventor

ENGELMANN SEBASTIAN U

US39 patents

⚠️ This page may combine multiple inventors who share the name “ENGELMANN SEBASTIAN U”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ENGELMANN SEBASTIAN U

IBM

Gate patterning of nano-channel devices

Techniques for forming contacts for active BEOL

Plasma shallow doping and wet removal of depth control cap

High aspect ratio patterning of hard mask materials by organic soft masks

High selectivity nitride removal process based on selective polymer deposition

High selectivity nitride removal process based on selective polymer deposition

Selective dry etch for directed self assembly of block copolymers

Neutral hard mask and its application to graphoepitaxy-based directed self-assembly (DSA) patterning

Rapid oxide etch for manufacturing through dielectric via structures

Molecular radical etch chemistry for increased throughput in pulsed plasma applications

High selectivity nitride removal process based on selective polymer deposition

III-V extension by high temperature plasma doping

Method of integrated circuit (IC) chip fabrication

Method of forming field effect transistor (FET) circuits, and forming integrated circuit (IC) chips with the FET circuits

Image reversal process for tight pitch pillar arrays

Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors

Low temperature encapsulation for magnetic tunnel junction

Techniques for fabricating horizontally aligned nanochannels for microfluidics and biosensors

Lateral etch stop for NEMS release etch for high density NEMS/CMOS monolithic integration

High selectivity nitride removal process based on selective polymer deposition

Wet clean process for removing CxHyFz etch residue

Selective dry etch for directed self assembly of block copolymers

Reactive ion etching assisted lift-off processes for fabricating thick metallization patterns with tight pitch

Wet clean process for removing CxHyFz etch residue

Self-aligned trench metal-alloying for III-V nFETs

GLOBALFOUNDRIES INC

Low-temperature sidewall image transfer process using ALD metals, metal oxides and metal nitrides

Low energy etch process for nitrogen-containing dielectric layer

Patterning transition metals in integrated circuits

Patterning transition metals in integrated circuits

CHANG JOSEPHINE B

High selectivity nitride etch process

Lateral etch stop for NEMS release etch for high density NEMS/CMOS monolithic integration

Borderless self-aligned metal contact patterning using printable dielectric materials

SLEIGHT JEFFREY W

Nanowire FET with trapezoid gate structure

Nanowire FET with trapezoid gate structure

BRINK MARKUS

Low energy etch process for nitrogen-containing dielectric layer

High fidelity patterning employing a fluorohydrocarbon-containing polymer

CABRAL JR CYRIL

Interconnect structure for improved time dependent dielectric breakdown

ELPIS TECH INC

Reactive ion etching assisted lift-off processes for fabricating thick metallization patterns with tight pitch

FULLER NICHOLAS C M

Gate patterning of nano-channel devices