Inventor
HOSODA NAOHIRO
JP24 patents
⚠️ This page may combine multiple inventors who share the name “HOSODA NAOHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SANDISK TECHNOLOGIES LLC
15 patentsUS10665580B1May 26, 2020
Bonded structure including a performance-optimized support chip and a stress-optimized three-dimensional memory chip and method for making the same
SANDISK TECHNOLOGIES LLC104 citations96
US10903237B1Jan 26, 2021
Three-dimensional memory device including stepped connection plates and methods of forming the same
SANDISK TECHNOLOGIES LLC44 citations94
US10115730B1Oct 30, 2018
Three-dimensional memory device containing structurally reinforced pedestal channel portions and method of making thereof
SANDISK TECHNOLOGIES LLC40 citations94
US9978766B1May 22, 2018
Three-dimensional memory device with electrically isolated support pillar structures and method of making thereof
SANDISK TECHNOLOGIES LLC45 citations93
US10453798B2Oct 22, 2019
Three-dimensional memory device with gated contact via structures and method of making thereof
SANDISK TECHNOLOGIES LLC15 citations86
US11018152B2May 25, 2021
Method for etching bottom punch-through opening in a memory film of a multi-tier three-dimensional memory device
SANDISK TECHNOLOGIES LLC13 citations85
US11011506B2May 18, 2021
Bonded structure including a performance-optimized support chip and a stress-optimized three-dimensional memory chip and method for making the same
SANDISK TECHNOLOGIES LLC9 citations84
US11417621B2Aug 16, 2022
Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
SANDISK TECHNOLOGIES LLC6 citations74
US11367733B1Jun 21, 2022
Memory die with source side of three-dimensional memory array bonded to logic die and methods of making the same
SANDISK TECHNOLOGIES LLC4 citations73
US11894298B2Feb 6, 2024
Three-dimensional memory device containing amorphous and crystalline blocking dielectric layers
SANDISK TECHNOLOGIES LLC2 citations71
US11289416B2Mar 29, 2022
Three-dimensional memory device containing amorphous and crystalline blocking dielectric layers
SANDISK TECHNOLOGIES LLC4 citations71
US10347647B1Jul 9, 2019
Three-dimensional memory device containing multi-threshold-voltage drain select gates and method of making the same
SANDISK TECHNOLOGIES LLC6 citations68
US12476192B2Nov 18, 2025
Three-dimensional memory device including a drain contact etch-stop dielectric layer and methods for forming the same
SANDISK TECHNOLOGIES LLC0 citations52
US12387789B2Aug 12, 2025
X-direction divided sub-block mode in NAND
SANDISK TECHNOLOGIES LLC0 citations52
US12550328B2Feb 10, 2026
Three-dimensional memory device including a mid-stack source layer and methods for forming the same
SANDISK TECHNOLOGIES LLC0 citations50
RENESAS TECH CORP
3 patentsUS7282411B2Oct 16, 2007
Method of manufacturing a nonvolatile semiconductor memory device
RENESAS TECH CORP13 citations83
US7419869B2Sep 2, 2008
Semiconductor device and a method for manufacturing the same
RENESAS TECH CORP2 citations63
US7303951B2Dec 4, 2007
Method of manufacturing a trench isolation region in a semiconductor device
RENESAS TECH CORP5 citations62
SANDISK TECHNOLOGIES INC
3 patentsUS12354944B2Jul 8, 2025
Three-dimensional memory device containing plural metal oxide blocking dielectric layers and method of making thereof
SANDISK TECHNOLOGIES INC0 citations62
US12456521B2Oct 28, 2025
Sub-block separation in NAND memory through word line based selectors
SANDISK TECHNOLOGIES INC0 citations49
US12437817B2Oct 7, 2025
Sub-block separation in NAND memory through word line based selectors
SANDISK TECHNOLOGIES INC0 citations45