Semiconductor device and manufacturing method of semiconductor device
Abstract
A semiconductor device of the present invention has a first insulating film formed between a control gate electrode and a semiconductor substrate and a second insulating film formed between a memory gate electrode and the semiconductor substrate and between the control gate electrode and the memory gate electrode, the second insulating film having a charge accumulating part therein. The second insulating film has a first film, a second film serving as a charge accumulating part disposed on the first film, and a third film disposed on the second film. The third film has a sidewall film positioned between the control gate electrode and the memory gate electrode and a deposited film positioned between the memory gate electrode and the semiconductor substrate. In this structure, the distance at a corner part of the second insulating film can be increased, and electric-field concentration can be reduced.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor device comprising:
a semiconductor substrate;
a first gate electrode disposed above the semiconductor substrate;
a second gate electrode disposed above the semiconductor substrate so as to be adjacent to the first gate electrode;
a first insulating film formed between the first gate electrode and the semiconductor substrate; and
a second insulating film formed between the second gate electrode and the semiconductor substrate and between the first gate electrode and the second gate electrode, the second insulating film having a charge accumulating part therein,
wherein the first and second gate electrodes are silicon electrodes,
the second insulating film includes:
a first film;
a second film disposed on the first film and serving as the charge accumulating part; and
a third film disposed on the second film,
the first film includes:
a sidewall film positioned between the first gate electrode and the second gate electrode; and
a deposited film positioned between the second gate electrode and the semiconductor substrate,
electrons are accumulated in the charge accumulating part,
the electrons accumulated in the charge accumulating part are erased when holes are injected by a tunneling phenomenon into the charge accumulating part via the third film from the second gate electrode side,
the deposited film extends also to a part between the sidewall film and the second gate electrode, and to a part in contact with the first gate electrode,
a height of the second gate electrode is higher than a height of the first gate electrode,
a height of the sidewall film is lower than the height of the first gate electrode, and
a width of the sidewall film is smallest at an uppermost part thereof and gradually increases from the uppermost part substantially to a bottom thereof.
2. The semiconductor device according to claim 1 , wherein a height and a width of the sidewall film is 10 nm or more and 20 nm or less.
3. The semiconductor device according to claim 1 , wherein a film thickness of the deposited film positioned between the second gate electrode and the semiconductor substrate is 6 nm or less.
4. The semiconductor device according to claim 3 , wherein the film thickness of the deposited film positioned between the second gate electrode and the semiconductor substrate is 2 nm or more.
5. The semiconductor device according to claim 1 , wherein the third film is a silicon oxynitride film.
6. The semiconductor device according to claim 5 , wherein the deposited film of the first film is a silicon oxide film.
7. The semiconductor device according to claim 1 , wherein the second gate electrode contains an impurity ion, and an impurity concentration in a lower part of the second gate electrode is lower than an impurity concentration in an upper part of the second gate electrode.
8. The semiconductor device according to claim 7 , wherein the impurity ion is an n-type impurity ion.
9. The semiconductor device according to claim 8 , wherein a lower part of the second gate electrode is intrinsic semiconductor.Cited by (0)
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