Inventor

TRINH STEPHEN

US43 patents

⚠️ This page may combine multiple inventors who share the name “TRINH STEPHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TRINH STEPHEN

SILICON STORAGE TECH INC

Testing circuitry and methods for analog neural memory in artificial neural network

Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism

Analog neural memory array storing synapsis weights in differential cell pairs in artificial neural network

Configurable input blocks and output blocks and physical layout for analog neural memory in deep learning artificial neural network

Decoding system and physical layout for analog neural memory in deep learning artificial neural network

Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural network

Adaptive bias decoder for non-volatile memory system

Adaptive bias decoder for non-volatile memory system

Adaptive bias decoder for non-volatile memory system

Output array neuron conversion and calibration for analog neural memory in deep learning artificial neural network

Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural network

Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system

Neural memory array storing synapsis weights in differential cell pairs

Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural network

Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system

Precision programming circuit for analog neural memory in deep learning artificial neural network

Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural network

Analog neural memory array in artificial neural network with substantially constant array source impedance with adaptive weight mapping and distributed power

Algorithms and circuitry for verifying a value stored during a programming operation of a non-volatile memory cell in an analog neural memory in deep learning artificial neural network

Input circuitry for analog neural memory in a deep learning artificial neural network

Multiple row programming operation in artificial neural network array

Read and programming decoding system for analog neural memory

Testing of analog neural memory cells in an artificial neural network

Setting levels for a programming operation in a neural network array

Neural network array comprising one or more coarse cells and one or more fine cells

Compensation for leakage in an array of analog neural memory cells in an artificial neural network

Testing circuitry and methods for analog neural memory in artificial neural network

Output block for array of non-volatile memory cells

Input and output blocks for an array of memory cells

Input and digital output mechanisms for analog neural memory in a deep learning artificial neural network

Artificial neural network comprising an analog array and a digital array

Split array architecture for analog neural memory in a deep learning artificial neural network

Analog neural memory array in artificial neural network with source line pulldown mechanism

Current-to-voltage converter comprising common mode circuit

ADESTO TECHNOLOGIES CORP

Concurrent read and reconfigured write operations in a memory device

Nonvolatile memory devices, systems and methods with switching charge pump architectures

Concurrent read and reconfigured write operations in a memory device

Nonvolatile memory devices, systems and methods with switching charge pump architectures

DE CARO RICHARD V

Ultra-deep power-down mode for memory devices

ADESTO TECH CORP

Concurrent read and write operations in a serial flash device

ATMEL CORP

Column redundancy RAM for dynamic bit replacement in FLASH memory

ARTEMIS ACQUISITION LLC

Ultra-deep power-down mode for memory devices

MANEA DANUT

Adaptive programming for non-volatile memory devices