P

Inventor

LU TSENG-FU

TW35 patents
⚠️ This page may combine multiple inventors who share the name “LU TSENG-FU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NANYA TECHNOLOGY CORP

34 patents
US11417744B2Aug 16, 2022

Semiconductor structure having buried gate electrode with protruding member and method of manufacturing the same

NANYA TECHNOLOGY CORP6 citations85
US11482419B2Oct 25, 2022

Method for preparing transistor device

NANYA TECHNOLOGY CORP2 citations73
US11315928B2Apr 26, 2022

Semiconductor structure with buried power line and buried signal line and method for manufacturing the same

NANYA TECHNOLOGY CORP4 citations73
US10818800B2Oct 27, 2020

Semiconductor structure and method for preparing the same

NANYA TECHNOLOGY CORP5 citations73
US10622030B1Apr 14, 2020

Memory structure with non-straight word line

NANYA TECHNOLOGY CORP4 citations73
US11094692B2Aug 17, 2021

Semiconductor structure having active regions with different dopant concentrations

NANYA TECHNOLOGY CORP4 citations72
US10937886B2Mar 2, 2021

Semiconductor device with negative capacitance material in buried channel

NANYA TECHNOLOGY CORP3 citations72
US10580765B1Mar 3, 2020

Semiconductor structure for electrostatic discharge protection

NANYA TECHNOLOGY CORP3 citations71
US10242978B1Mar 26, 2019

Semiconductor electrostatic discharge protection device

NANYA TECHNOLOGY CORP2 citations71
US10763212B1Sep 1, 2020

Semiconductor structure

NANYA TECHNOLOGY CORP6 citations70
US11848353B2Dec 19, 2023

Method of fabricating semiconductor structure

NANYA TECHNOLOGY CORP0 citations62
US11818876B2Nov 14, 2023

Method of manufacturing semiconductor device having reduced contact resistance between access transistors and conductive features

NANYA TECHNOLOGY CORP0 citations62
US11677008B2Jun 13, 2023

Method for preparing semiconductor device with T-shaped buried gate electrode

NANYA TECHNOLOGY CORP0 citations62
US11647623B2May 9, 2023

Method for manufacturing semiconductor structure with buried power line and buried signal line

NANYA TECHNOLOGY CORP0 citations62
US11605718B2Mar 14, 2023

Method for preparing semiconductor structure having buried gate electrode with protruding member

NANYA TECHNOLOGY CORP0 citations62
US11502163B2Nov 15, 2022

Semiconductor structure and fabrication method thereof

NANYA TECHNOLOGY CORP0 citations62
US11502075B2Nov 15, 2022

Method of forming semiconductor structure

NANYA TECHNOLOGY CORP0 citations62
US11469234B2Oct 11, 2022

Semiconductor device having reduced contact resistance between access transistors and conductive features and method of manufacturing the same

NANYA TECHNOLOGY CORP0 citations62
US11437481B2Sep 6, 2022

Semiconductor device with T-shaped buried gate electrode and method for forming the same

NANYA TECHNOLOGY CORP0 citations62
US10903080B2Jan 26, 2021

Transistor device and method for preparing the same

NANYA TECHNOLOGY CORP0 citations62
US10825898B2Nov 3, 2020

Semiconductor layout structure including asymmetrical channel region

NANYA TECHNOLOGY CORP1 citations62
US10559661B2Feb 11, 2020

Transistor device and semiconductor layout structure including asymmetrical channel region

NANYA TECHNOLOGY CORP1 citations62
US10461191B2Oct 29, 2019

Semiconductor device with undercutted-gate and method of fabricating the same

NANYA TECHNOLOGY CORP1 citations62
US10418356B2Sep 17, 2019

Diode structure and electrostatic discharge protection device including the same

NANYA TECHNOLOGY CORP1 citations60
US12507402B2Dec 23, 2025

Memory with a contact between a data storage device and a data processing device

NANYA TECHNOLOGY CORP0 citations52
US12495541B2Dec 9, 2025

Memory structure and method of forming thereof

NANYA TECHNOLOGY CORP0 citations52
US12453084B2Oct 21, 2025

Method for manufacturing a semiconductor memory

NANYA TECHNOLOGY CORP0 citations52
US10825931B2Nov 3, 2020

Semiconductor device with undercutted-gate and method of fabricating the same

NANYA TECHNOLOGY CORP0 citations51
US10381351B2Aug 13, 2019

Transistor structure and semiconductor layout structure

NANYA TECHNOLOGY CORP0 citations51
US11107807B1Aug 31, 2021

IC package having a metal die for ESP protection

NANYA TECHNOLOGY CORP0 citations50
US11037921B2Jun 15, 2021

Off chip driver structure

NANYA TECHNOLOGY CORP0 citations50
US10559560B2Feb 11, 2020

Semiconductor electrostatic discharge protection device

NANYA TECHNOLOGY CORP0 citations50
US12063771B2Aug 13, 2024

Memory structure and method of forming thereof

NANYA TECHNOLOGY CORP0 citations49
US12424564B2Sep 23, 2025

Semiconductor device having a shielding line for signal crosstalk suppression

NANYA TECHNOLOGY CORP0 citations41

LAI CHAO-SUNG

1 patent