Inventor

ABBOTT TODD R

US45 patents

⚠️ This page may combine multiple inventors who share the name “ABBOTT TODD R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ABBOTT TODD R

MICRON TECHNOLOGY INC

DRAM layout with vertical FETs and method of formation

Methods of forming semiconductor structures

DRAM layout with vertical FETs and method of formation

Method of forming a field effect transistor

DRAM layout with vertical FETS and method of formation

Semiconductor constructions

Suppression of cross diffusion and gate depletion

Cross-diffusion resistant dual-polycide semiconductor structure and method

Method of forming plugs and local interconnect for embedded memory/system-on-chip (SOC) applications

DRAM layout with vertical FETs and method of formation

Formation of memory cells and select gates of NAND memory arrays

Methods of forming a transistor with an integrated metal silicide gate electrode

Method of forming local interconnects

Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same

DRAM including a vertical surround gate transistor

DRAM including a vertical surround gate transistor

Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications

DRAM layout with vertical FETS and method of formation

DRAM layout with vertical FETs and method of formation

Method of forming a field effect transistor with halo implant regions

Method of forming a field effect transistor

Integrated transistor circuitry

Conductive structure for microelectronic devices and methods of fabricating such structures

Sidewall strap for complementary semiconductor structures and method of making same

Cross-diffusion resistant dual-polycide semiconductor structure and method

Method of forming a local interconnect, method of fabricating integrated circuitry comprising an sram cell having a local interconnect and having circuitry peripheral to the sram cell, and method of forming contact plugs

Methods of forming a local interconnect method of fabricating integrated circuitry comprising an SRAM cell having a local interconnect and having circuitry peripheral to the SRAM cell and method of forming contact plugs

Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same

Suppression of cross diffusion and gate depletion

Memory cells and select gates of NAND memory arrays

NAND memory arrays and methods

Semiconductor damascene trench and methods thereof

Method for forming a thin film transistor

Photoresist processing methods

Methods of forming a transistor with an integrated metal silicide gate electrode

Conductive structure for microelectronic devices and methods of fabricating such structures

Semiconductor damascene trench and methods thereof

Integrated circuitry

Method for forming a thin film transistor

ABBOTT TODD R

DRAM layout with vertical FETs and method of formation

DRAM layout with vertical FETS and method of formation

DRAM layout with vertical FETs and method of formation

TOREK KEVIN J

Photoresist processing methods

Photoresist processing methods

MICRON TECHONLOGY INC

Sidewall strap for complementary semiconductor structures and method of making same