Inventor
HUANG CHUNG-LIN
TW79 patents
⚠️ This page may combine multiple inventors who share the name “HUANG CHUNG-LIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NANYA TECHNOLOGY CORP
41 patentsUS6916715B2Jul 12, 2005
Method for fabricating a vertical NROM cell
NANYA TECHNOLOGY CORP51 citations96
US6893919B2May 17, 2005
Floating gate and fabricating method of the same
NANYA TECHNOLOGY CORP26 citations93
US6815290B2Nov 9, 2004
Stacked gate flash memory device and method of fabricating the same
NANYA TECHNOLOGY CORP20 citations93
US6847068B2Jan 25, 2005
Floating gate and fabrication method therefor
NANYA TECHNOLOGY CORP19 citations92
US6451654B1Sep 17, 2002
Process for fabricating self-aligned split gate flash memory
NANYA TECHNOLOGY CORP36 citations92
US6100117AAug 8, 2000
Method for manufacturing DRAM having a redundancy circuit region
NANYA TECHNOLOGY CORP27 citations91
US6486032B1Nov 26, 2002
Method for fabricating control gate and floating gate of a flash memory cell
NANYA TECHNOLOGY CORP37 citations89
US10559568B1Feb 11, 2020
Method for preparing semiconductor capacitor structure
NANYA TECHNOLOGY CORP13 citations86
US6770532B2Aug 3, 2004
Method for fabricating memory unit with T-shaped gate
NANYA TECHNOLOGY CORP13 citations84
US6770520B2Aug 3, 2004
Floating gate and method of fabricating the same
NANYA TECHNOLOGY CORP13 citations84
US6475894B1Nov 5, 2002
Process for fabricating a floating gate of a flash memory in a self-aligned manner
NANYA TECHNOLOGY CORP18 citations83
US7700991B2Apr 20, 2010
Two bit memory structure and method of making the same
NANYA TECHNOLOGY CORP11 citations82
US7682902B2Mar 23, 2010
Memory structure and method of making the same
NANYA TECHNOLOGY CORP16 citations82
US7005701B2Feb 28, 2006
Method for fabricating a vertical NROM cell
NANYA TECHNOLOGY CORP6 citations74
US6872623B2Mar 29, 2005
Floating gate and fabricating method thereof
NANYA TECHNOLOGY CORP8 citations74
US6855966B2Feb 15, 2005
Floating gate and fabricating method of the same
NANYA TECHNOLOGY CORP8 citations74
US6800526B2Oct 5, 2004
Method for manufacturing a self-aligned split-gate flash memory cell
NANYA TECHNOLOGY CORP11 citations74
US6773993B2Aug 10, 2004
Method for manufacturing a self-aligned split-gate flash memory cell
NANYA TECHNOLOGY CORP10 citations74
US6649474B1Nov 18, 2003
Method for fabricating a source line of a flash memory cell
NANYA TECHNOLOGY CORP9 citations74
US6518153B1Feb 11, 2003
Method for making gate electrodes of low sheet resistance for embedded dynamic random access memory devices
NANYA TECHNOLOGY CORP7 citations74
US10985163B2Apr 20, 2021
Semiconductor capacitor structure
NANYA TECHNOLOGY CORP2 citations73
US10573725B1Feb 25, 2020
Semiconductor structure and manufacturing method thereof
NANYA TECHNOLOGY CORP2 citations73
US6403483B1Jun 11, 2002
Shallow trench isolation having an etching stop layer and method for fabricating same
NANYA TECHNOLOGY CORP9 citations70
US12575158B2Mar 10, 2026
Semiconductor device including multiple spacers and a method for preparing the same
NANYA TECHNOLOGY CORP0 citations63
US12484215B2Nov 25, 2025
Memory cell with improved insulating structure
NANYA TECHNOLOGY CORP0 citations63
US12446211B2Oct 14, 2025
Memory device having ultra-lightly doped region
NANYA TECHNOLOGY CORP0 citations63
US12225717B2Feb 11, 2025
Semiconductor device with dielectric structure having enlargemant portion surrounding word line
NANYA TECHNOLOGY CORP0 citations63
US12225709B2Feb 11, 2025
Semiconductor device and manufacturing method thereof
NANYA TECHNOLOGY CORP0 citations63
US11943910B2Mar 26, 2024
Semiconductor device and manufacturing method thereof
NANYA TECHNOLOGY CORP0 citations63
US11805640B2Oct 31, 2023
Manufacturing method of a semiconductor device using a protect layer along a top sidewall of a trench to widen the bottom of the trench
NANYA TECHNOLOGY CORP0 citations63
US11557549B2Jan 17, 2023
Method of manufacturing semiconductor structure having dummy pattern around array area
NANYA TECHNOLOGY CORP0 citations63
US11315887B2Apr 26, 2022
Semiconductor structure having dummy pattern around array area and method of manufacturing the same
NANYA TECHNOLOGY CORP0 citations63
US7323743B2Jan 29, 2008
Floating gate
NANYA TECHNOLOGY CORP2 citations63
US7205603B2Apr 17, 2007
Floating gate and fabricating method thereof
NANYA TECHNOLOGY CORP3 citations63
US6921694B2Jul 26, 2005
Method for fabricating floating gate
NANYA TECHNOLOGY CORP4 citations63
US6768164B2Jul 27, 2004
Stacked gate flash memory device and method of fabricating the same
NANYA TECHNOLOGY CORP2 citations63
US6713349B2Mar 30, 2004
Method for fabricating a split gate flash memory cell
NANYA TECHNOLOGY CORP6 citations63
US6673676B2Jan 6, 2004
Method of fabricating a flash memory cell
NANYA TECHNOLOGY CORP2 citations63
US6649473B1Nov 18, 2003
Method of fabricating a floating gate for split gate flash memory
NANYA TECHNOLOGY CORP4 citations63
US12219749B2Feb 4, 2025
Method of manufacturing semiconductor device structure having a channel layer with different roughness
NANYA TECHNOLOGY CORP0 citations61
US7781279B2Aug 24, 2010
Method for manufacturing a memory
NANYA TECHNOLOGY CORP2 citations60
LEE TZUNG-HAN
4 patentsUS8431933B2Apr 30, 2013
Memory layout structure and memory structure
LEE TZUNG-HAN5 citations73
US8455363B2Jun 4, 2013
Method for adjusting trench depth of substrate
LEE TZUNG-HAN2 citations63
US8471320B2Jun 25, 2013
Memory layout structure
LEE TZUNG-HAN2 citations62
US8298892B1Oct 30, 2012
Fabricating method of insulator
LEE TZUNG-HAN4 citations62
INOTERA MEMORIES INC
2 patentsHUANG SHIN-BIN
2 patentsUNIV SOUTHERN TAIWAN SCI & TEC
1 patentShowing the top 50 of 79 patents by PatentIndex Score.