Inventor

SALISBURY SEAN JAMES

GB27 patents

⚠️ This page may combine multiple inventors who share the name “SALISBURY SEAN JAMES”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SALISBURY SEAN JAMES

ADVANCED RISC MACH LTD

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

Interconnect and method of managing a snoop filter for an interconnect

Coherency checking of invalidate transactions caused by snoop filter eviction in an integrated circuit

Interconnect and method of handling supplementary data in an interconnect

Enforcing ordering of snoop transactions in an interconnect for an integrated circuit

Resource allocation for atomic data access requests

Chunking for burst read transactions

Increased throughput for writes to memory

Cache for storing coherent and non-coherent data

Receiver based communication permission token allocation

Circuitry and method

Latency optimized eviction allocation for memories

Apparatus and method for buffered interconnect

Handling write requests for a data array

Transaction response modification within interconnect circuitry

Resizing circuitry

Burst read with flexible burst length for on-chip memory

Interconnection network for integrated circuit with fault detection circuitry provided locally to an upstream location

Cache coherency

Cache coherency

Hazard checking control within interconnect circuitry

Relative data width indication for read responses routed by an interconnect

Transaction handling

Interconnect and method of operation of an interconnect for ordered write observation (OWO)

Integrated circuit design and fabrication

TUNE ANDREW DAVID

Selecting between contending data packets to limit latency differences between sources

SALISBURY SEAN JAMES

Converging interconnect node controlling operation related to associated future item in dependence upon data predicted based on current transaction data item passing through