Inventor

NEUDECK GEROLD W

US14 patents

⚠️ This page may combine multiple inventors who share the name “NEUDECK GEROLD W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PURDUE RESEARCH FOUNDATION

13 patents

US5273921ADec 28, 1993

Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor

PURDUE RESEARCH FOUNDATION127 citations99

US5494837AFeb 27, 1996

Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls

PURDUE RESEARCH FOUNDATION90 citations96

US5349228ASep 20, 1994

Semiconductor-on-insulator electronic devices having trench isolated monocrystalline active regions

PURDUE RESEARCH FOUNDATION26 citations92

US4829016AMay 9, 1989

Bipolar transistor by selective and lateral epitaxial overgrowth

PURDUE RESEARCH FOUNDATION30 citations92

US5422299AJun 6, 1995

Method of forming single crystalline electrical isolated wells

PURDUE RESEARCH FOUNDATION30 citations90

US5134454AJul 28, 1992

Self-aligned integrated circuit bipolar transistor having monocrystalline contacts

PURDUE RESEARCH FOUNDATION24 citations89

US5118634AJun 2, 1992

Self-aligned integrated circuit bipolar transistor having monocrystalline contacts

PURDUE RESEARCH FOUNDATION39 citations89

US5434092AJul 18, 1995

Method for fabricating a triple self-aligned bipolar junction transistor

PURDUE RESEARCH FOUNDATION17 citations82

US5286996AFeb 15, 1994

Triple self-aligned bipolar junction transistor

PURDUE RESEARCH FOUNDATION14 citations82

US5382828AJan 17, 1995

Triple self-aligned bipolar junction transistor

PURDUE RESEARCH FOUNDATION9 citations74

DELCO ELECTRONICS CORP

1 patent

US5068203ANov 26, 1991

Method for forming thin silicon membrane or beam

DELCO ELECTRONICS CORP70 citations94

NEUDECK GEROLD W

PURDUE RESEARCH FOUNDATION

Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor

Method of forming semiconductor-on-insulator electronic devices by growing monocrystalline semiconducting regions from trench sidewalls

Dual-gated semiconductor-on-insulator field effect transistor

Integrable MOS and IGBT devices having trench gate structure

Corner cube arrays and manufacture thereof

Semiconductor-on-insulator electronic devices having trench isolated monocrystalline active regions

Bipolar transistor by selective and lateral epitaxial overgrowth

Method of forming single crystalline electrical isolated wells

Self-aligned integrated circuit bipolar transistor having monocrystalline contacts

Self-aligned integrated circuit bipolar transistor having monocrystalline contacts

Method for fabricating a triple self-aligned bipolar junction transistor

Triple self-aligned bipolar junction transistor

Triple self-aligned bipolar junction transistor

DELCO ELECTRONICS CORP

Method for forming thin silicon membrane or beam