Inventor

MANOHAR RAJIT

US54 patents

⚠️ This page may combine multiple inventors who share the name “MANOHAR RAJIT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MANOHAR RAJIT

ACHRONIX SEMICONDUCTOR CORP

Fault tolerant asynchronous circuits

Systems and methods for performing automated conversion of representations of synchronous circuit designs to and from representations of asynchronous circuit designs

Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics

Fault tolerant asynchronous circuits

Synchronous to asynchronous logic conversion

Converting a synchronous circuit design into an asynchronous design

Methods and systems for converting a synchronous circuit fabric into an asynchronous dataflow circuit fabric

One phase logic

Asynchronous conversion circuitry apparatus, systems, and methods

Fault tolerant asynchronous circuits

Fault tolerant asynchronous circuits

Asynchronous pipelined interconnect architecture with fanout support

Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics

Asynchronous circuit representation of synchronous circuit with asynchronous inputs

MANOHAR RAJIT

Automated conversion of synchronous to asynchronous circuit design representations

Fault tolerant asynchronous circuits

Asynchronous pipelined interconnect architecture with fanout support

Multi-clock asynchronous logic circuits

Reset mechanism conversion

Asychronous system analysis

Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics

Reset mechanism conversion

Non-predicated to predicated conversion of asynchronous representations

Reconfigurable logic fabrics for integrated circuits and systems and methods for configuring reconfigurable logic fabrics

Asynchronous conversion circuitry apparatus, systems, and methods

Systems and methods for zero-delay wakeup for power gated asynchronous pipelines

Synchronous to asynchronous logic conversion

CORNELL RES FOUNDATION INC

Asynchronous analog-to-digital converter and method

Programmable asynchronous pipeline arrays

Self-timed thermally-aware circuits and methods of use thereof

Sensor-network processors using event-driven architecture

Event-synchronization protocol for parallel simulation of large-scale wireless networks

CALIFORNIA INST OF TECHN

Pipelined asynchronous processing

Pipelined asynchronous processing

Exception processing in asynchronous processor

Method and apparatus for a failure-free synchronizer

Parallel prefix operations in asynchronous processors

UNIV CORNELL

Methods and systems for synchronization between multiple clock domains

Methods and systems for synchronization between multiple clock domains

Automated layout for integrated circuits with nonstandard cells

Low power asynchronous GPS baseband processor

AKOPYAN FILIPP

Neuromorphic event-driven neural computing architecture in a scalable neural network

Neuromorphic event-driven neural computing architecture in a scalable neural network

EKANAYAKE VIRANTHA

Programmable crossbar structures in asynchronous systems

Token enhanced asynchronous conversion of synchonous circuits

NIJSSEN RAYMOND

One phase logic

One phase logic

IBM

Neuromorphic event-driven neural computing architecture in a scalable neural network

Neuromorphic event-driven neural computing architecture in a scalable neural network

PAUL GAEL

Logic performance in cyclic structures