US8234607B2ActiveUtilityA1

Token enhanced asynchronous conversion of synchonous circuits

67
Assignee: EKANAYAKE VIRANTHAPriority: Sep 15, 2009Filed: Sep 15, 2009Granted: Jul 31, 2012
Est. expirySep 15, 2029(~3.2 yrs left)· nominal 20-yr term from priority
G06F 30/35
67
PatentIndex Score
4
Cited by
10
References
10
Claims

Abstract

A synchronous circuit design is converted to an asynchronous circuit by converting synchronous circuit logic to an asynchronous circuit logic, and one or more additional tokens into the converted asynchronous circuit. The circuit is initialized with a desired additional number of tokens placed in the asynchronous circuit, or a desired number of tokens are inserted at an input before taking tokens from an output.

Claims

exact text as granted — not AI-modified
1. A method of converting a synchronous circuit to an asynchronous circuit, comprising:
 converting synchronous circuit logic to asynchronous circuit logic by using a computer; 
 inserting one or more additional tokens into the converted asynchronous circuit by inserting the one or more additional tokens at an input before taking tokens from an output; and 
 inserting tokens at the input and taking tokens from the output at a one-to-one ratio after inserting the one or more additional tokens at the input before taking tokens from the output. 
 
     
     
       2. The method of converting a synchronous circuit to an asynchronous circuit of  claim 1 , wherein inserting one or more additional tokens into the converted asynchronous circuit comprises initializing the circuit with the one or more additional tokens placed in the asynchronous circuit. 
     
     
       3. The method of converting a synchronous circuit to an asynchronous circuit of  claim 1 , wherein converting synchronous circuit logic to asynchronous circuit logic comprises converting at least one of inputs, outputs, registers, and flip-flops in the synchronous circuit to tokens in the asynchronous circuit. 
     
     
       4. An asynchronous circuit, comprising:
 an asynchronous logic network derived from a synchronous circuit design; and 
 at least one additional token added into the converted asynchronous circuit, wherein the at least one additional token comprises one or more additional tokens inserted into an input of the converted asynchronous circuit before tokens are taken from an output, and wherein tokens are inserted at the input and taken at the output at a one-to-one ratio after the additional tokens inserted at an input before tokens are taken from an output. 
 
     
     
       5. The asynchronous circuit of  claim 4 , wherein the asynchronous logic network comprises at least one token converted from at least one of inputs, outputs, registers, and flip-flops in the synchronous circuit. 
     
     
       6. The asynchronous circuit of  claim 4 , wherein the at least one additional token comprises the one or more additional tokens placed in the asynchronous circuit during initialization of the asynchronous circuit. 
     
     
       7. The asynchronous circuit of  claim 4 , wherein the asynchronous logic network comprises a logic network in a Field Programmable Gate Array (FPGA). 
     
     
       8. A non-transitory machine-readable medium with instructions stored thereon, the instructions when executed operable to cause a computerized system to:
 convert synchronous circuit logic to asynchronous circuit logic; 
 insert one or more additional tokens into the converted asynchronous circuit by inserting the one or more additional tokens at an input before taking tokens from an output; and 
 insert tokens at the input and taking tokens from the output at a one-to-one ratio after inserting the one or more additional tokens at the input before taking tokens from the output. 
 
     
     
       9. The non-transitory machine-readable medium of  claim 8 , wherein inserting one or more additional tokens into the converted asynchronous circuit comprises initializing the circuit with the one or more additional tokens placed in the asynchronous circuit. 
     
     
       10. The non-transitory machine-readable medium of  claim 8 , wherein converting synchronous circuit logic to asynchronous circuit logic comprises converting at least one of inputs, outputs, registers, and flip-flops in the synchronous circuit to tokens in the asynchronous circuit.

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