Inventor

AL-OTOOM MUAWYA M

US23 patents

⚠️ This page may combine multiple inventors who share the name “AL-OTOOM MUAWYA M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AL-OTOOM MUAWYA M

APPLE INC

System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instruction

Branch prediction system

Indirect branch predictor based on register operands

Cache for patterns of instructions with multiple forward control transfers

History file for previous register mapping storage and last reference indication

Biased indirect control transfer prediction

Multi-table signature prefetch

Zero cycle load bypass in a decode group

Trace cache access prediction and read enable

Trace cache that supports multiple different trace lengths

Sharing branch predictor resource for instruction cache and trace cache predictions

Next fetch predictor for trace cache

Program counter zero-cycle loads

Trace cache with filter for internal control transfer inclusion

Multi-degree branch predictor

Trace cache techniques based on biased control transfer instructions

INTEL CORP

Accelerated interlane vector reduction instructions

Detection of memory address aliasing and violations of data dependency relationships

Accelerated interlane vector reduction instructions

System, method and apparatus for improving transactional memory (TM) throughput using TM region indicators

CAPRIOLI PAUL

Instruction and logic to control transfer in a partial binary translation system

Hardware profiling mechanism to enable page level automatic binary translation

AL-OTOOM MUAWYA M

Memory disambiguation hardware to support software binary translation