P

Inventor

CHENNUPATY SRINIVAS

US62 patents
⚠️ This page may combine multiple inventors who share the name “CHENNUPATY SRINIVAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

44 patents
US6014735AJan 11, 2000

Instruction set extension using prefixes

INTEL CORP150 citations98
US6041404AMar 21, 2000

Dual function system and method for shuffling packed data elements

INTEL CORP162 citations95
US7155601B2Dec 26, 2006

Multi-element operand sub-portion shuffle instruction execution

INTEL CORP73 citations94
US7133040B1Nov 7, 2006

System and method for performing an insert-extract instruction

INTEL CORP56 citations94
US9448802B2Sep 20, 2016

Instruction and logic for processing text strings

INTEL CORP6 citations92
US8819394B2Aug 26, 2014

Instruction and logic for processing text strings

INTEL CORP7 citations92
US10256971B2Apr 9, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP2 citations84
US9772847B2Sep 26, 2017

Instruction and logic for processing text strings

INTEL CORP3 citations84
US9772846B2Sep 26, 2017

Instruction and logic for processing text strings

INTEL CORP3 citations84
US9740490B2Aug 22, 2017

Instruction and logic for processing text strings

INTEL CORP3 citations84
US9703564B2Jul 11, 2017

Instruction and logic for processing text strings

INTEL CORP3 citations84
US9632784B2Apr 25, 2017

Instruction and logic for processing text strings

INTEL CORP2 citations84
US8825987B2Sep 2, 2014

Instruction and logic for processing text strings

INTEL CORP5 citations84
US7738484B2Jun 15, 2010

Method, system, and apparatus for system level initialization

INTEL CORP8 citations84
US6738793B2May 18, 2004

Processor capable of executing packed shift operations

INTEL CORP7 citations74
US6275904B1Aug 14, 2001

Cache pollution avoidance instructions

INTEL CORP14 citations74
US11537398B2Dec 27, 2022

Instruction and logic for processing text strings

INTEL CORP0 citations73
US11029955B2Jun 8, 2021

Instruction and logic for processing text strings

INTEL CORP0 citations73
US11023236B2Jun 1, 2021

Instruction and logic for processing text strings

INTEL CORP0 citations73
US10929131B2Feb 23, 2021

Instruction and logic for processing text strings

INTEL CORP1 citations73
US10581590B2Mar 3, 2020

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10554386B2Feb 4, 2020

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10313107B2Jun 4, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10291394B2May 14, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10270589B2Apr 23, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10263769B2Apr 16, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10256972B2Apr 9, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10187201B2Jan 22, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10181945B2Jan 15, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10171232B2Jan 1, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10171231B2Jan 1, 2019

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10164769B2Dec 25, 2018

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10158478B2Dec 18, 2018

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9654282B2May 16, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9654281B2May 16, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9647831B2May 9, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9641320B2May 2, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9641319B2May 2, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9634829B2Apr 25, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9634830B2Apr 25, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US9634828B2Apr 25, 2017

Flexible architecture and instruction for advanced encryption standard (AES)

INTEL CORP0 citations63
US10261795B2Apr 16, 2019

Instruction and logic for processing text strings

INTEL CORP0 citations62
US9804848B2Oct 31, 2017

Instruction and logic for processing text strings

INTEL CORP1 citations62
US9740489B2Aug 22, 2017

Instruction and logic for processing text strings

INTEL CORP0 citations62

JULIER MICHAEL A

2 patents

GUERON SHAY

1 patent

HUGHES CHRISTOPHER J

1 patent

DIXON MARTIN

1 patent

ROUSSEL PATRICE

1 patent

Showing the top 50 of 62 patents by PatentIndex Score.