Inventor

ZHAO LARRY

US27 patents

⚠️ This page may combine multiple inventors who share the name “ZHAO LARRY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ZHAO LARRY

GLOBALFOUNDRIES INC

Hybrid manganese and manganese nitride barriers for back-end-of-line metallization and methods for fabricating the same

Methods of forming cap layers for semiconductor devices with self-aligned contact elements and the resulting devices

Semiconductor device having a self-forming barrier layer at via bottom

Methods of producing integrated circuits with an air gap

Electro-migration enhancing method for self-forming barrier process in copper metalization

Methods of forming conductive copper-based structures using a copper-based nitride seed layer without a barrier layer and the resulting device

Electroless fill of trench in semiconductor structure

Semiconductor device having a self-forming barrier layer at via bottom

Methods for integration of pore stuffing material

Semiconductor device having a self-forming barrier layer at via bottom

Methods of forming a metal cap layer on copper-based conductive structures on an integrated circuit device

Electro-migration enhancing method for self-forming barrier process in copper mettalization

Copper based nitride liner passivation layers for conductive copper structures

Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting device

ADVANCED MICRO DEVICES INC

Method of forming nitride capped Cu lines with reduced electromigration along the Cu/nitride interface

Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices

Method of selectively alloying interconnect regions by ion implantation

Cu capping layer deposition with improved integrated circuit reliability

Method of selectively alloying interconnect regions by deposition process

Dielectric barrier layer for a copper metallization layer having a varying silicon concentration along its thickness

LAM RES CORP

Interlevel conductor pre-fill utilizing selective barrier deposition

Interlevel conductor pre-fill utilizing selective barrier deposition

Using electroless deposition as a metrology tool to highlight contamination, residue, and incomplete via etch

Interlevel conductor pre-fill utilizing selective barrier deposition

LIN SEAN X

Methods of forming copper-based conductive structures on an integrated circuit device

Methods of forming copper-based conductive structures by forming a copper-based seed layer having an as-deposited thickness profile and thereafter performing an etching process and electroless copper deposition

GLOBAL FOUNDRIES INC

Integrated circuits including selectively deposited metal capping layers on copper lines and methods for fabricating the same