Inventor

HOOGERBRUGGE JAN

NL78 patents

⚠️ This page may combine multiple inventors who share the name “HOOGERBRUGGE JAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOOGERBRUGGE JAN

NXP BV

Secure device anti-tampering circuit

Wake-up and sleep conditions of processors in a multi-processor system

Method for protecting a machine learning model from a side channel attack

Data processing system and method for accessing data in the data processing system

Method and system for operating a cache in a trusted execution environment

Behavioral fingerprint in a white-box implementation

Clock selection circuit and method

Secure application execution in a data processing system

Probabilistic memory safety using cryptography

Using a memory safety violation indicator to detect accesses to an out-of-bounds or unallocated memory area

Data processing system and method for protecting data in the data processing system

Anomaly detection in a data processing system

Data processor with multi-command instruction words

Using approximate membership query filters for efficient control flow integrity protection

Method for protecting a machine learning model from being copied

Data processing system having tagged and untagged address pointers and method for accessing a location in the data processing system

Compilation scheme for tagged global variables

Protecting the input/output of modular encoded white-box RSA

White-box implementations with garbled circuits

Method for introducing dependence of white-box implementation on a set of strings

White-box modular exponentiation

Realizing authorization via incorrect functional behavior of a white-box implementation

Method to protect a stack from manipulation in a data processing system

Cycle stealing when a process or environmental variation is detected and a processing instruction is using a critical path

Control flow flattening for code obfuscation where the next block calculation needs run-time information

Method for protecting a machine learning model from a side channel attack

Program code protection in a data processing system

Data processing system having a monitoring system and method for monitoring

Protecting the input/output of modular encoded white-box RSA/ECC

Array indexing with modular encoded values

System and method for implementing a host card emulation (HCE) command stack in a mobile phone

Splitting S-boxes in a white-box implementation to resist attacks

S-box in cryptographic implementation

Using single white-box implementation with multiple external encodings

KONINKL PHILIPS ELECTRONICS NV

Data processing device, method of executing a program and method of compiling

Method of executing an interpreter program

Retargetable compiling system and method

Configurable data processing device with bit reordering on inputs and outputs of configurable logic function blocks

Data processing apparatus with a cache memory and method of using such an apparatus

Coherent caching of local memory data

Method of executing an interpreter program

Interruptible digital signal processor having two instruction sets

Signal processing device and method for supplying a signal processing result to a plurality of registers

HOOGERBRUGGE JAN

Allocating registers for loop variables in a multi-threaded processor

Memory controller and method for writing to a memory

Multiprocessor system with mixed software hardware controlled cache management

PHILIPS CORP

Method and processor for structuring a multi-instruction computer program in an internal directed acyclic graph

KONKLIJKE PHILIPS ELECTRONICS

System for executing computer program using a configurable functional unit, included in a processor, for executing configurable instructions having an effect that are redefined at run-time

AL-KADI GHIATH

Parallel three-dimensional recursive search (3DRS) meandering algorithm

MICHIELS WIL

Implementing padding in a white-box implementation