Cycle stealing when a process or environmental variation is detected and a processing instruction is using a critical path

Abstract

This invention provides a clock control circuit, which can be added to any pipeline-processor to solve timing problems arising from variations due to process outcome and environmental conditions. Critical instructions are detected (instructions that exercise critical paths) in conjunction with environmental sensing (such as process, temperature and voltage). This information is used to control cycle stealing.

The invention claimed is: 
     
       1. A clock control circuit for controlling a clock signal used by a processing system which receives processing instructions, comprising:
 a sensor arrangement for sensing process or environmental variations and determining therefrom whether or not cycle stealing may be required; 
 a detector arrangement for determining if a processing instruction uses a critical path in the processing system; and 
 a clock control unit for implementing cycle stealing when it is determined by the sensor arrangement that cycle stealing may be required and when it is determined by the detector arrangement that the processing instruction uses a critical path. 
 
     
     
       2. A circuit as claimed in  claim 1 , wherein the sensor arrangement comprises one or more of:
 a ring-oscillator sensor; 
 a temperature sensor; 
 a voltage supply drop sensor; and 
 an aging detector. 
 
     
     
       3. A circuit as claimed in  claim 1 , wherein the detector arrangement comprises a database which stores information about each instruction supported by the processing system which uses a critical path. 
     
     
       4. A circuit as claimed in  claim 3 , wherein the detector arrangement comprises a partial decoder for partially decoding the processing instruction, and the database stores information accessed by the partially decoded instructions. 
     
     
       5. A circuit as claimed in  claim 3 , wherein the detector arrangement comprises a look up table. 
     
     
       6. A circuit as claimed in  claim 3 , wherein the detector arrangement provides an output which indicates that the processing instruction is a critical instruction and identifies for which processing unit the instruction forms a critical path. 
     
     
       7. A processing system, comprising:
 at least one processor; 
 a clock signal generator; and 
 a clock control circuit as claimed in  claim 1 , for processing the clock signal of the clock signal generator. 
 
     
     
       8. A system as claimed in  claim 7 , comprising a plurality of processors, comprising at least a fetch unit, a control unit, and an execute unit. 
     
     
       9. A system as claimed in  claim 7 , comprising a CPU architecture. 
     
     
       10. A clock control method for controlling a clock signal used by a processing system which receives processing instructions, comprising:
 sensing process or environmental variations and determining therefrom whether or not cycle stealing may be required; 
 determining if a processing instruction uses a critical path in the processing system; and 
 implementing cycle stealing when it is determined by the sensor arrangement that cycle stealing may be required and when it is determined by the detector arrangement that the processing instruction uses a critical path. 
 
     
     
       11. A method as claimed in  claim 10 , wherein the sensing comprises sensing one or more of:
 circuit timing; 
 temperature; 
 a voltage supply drop; and 
 aging conditions. 
 
     
     
       12. A method as claimed in  claim 10 , wherein the determining comprises comparing the processing instruction with a database which stores information about at least each instruction supported by the processing system which uses a critical path. 
     
     
       13. A method as claimed in  claim 12 , wherein the determining comprises partially decoding the processing instruction, and the database stored information accessed by the partially decoded instructions. 
     
     
       14. A method as claimed in  claim 12 , wherein the determining comprises indicates that the processing instruction is a critical instruction and identifying for which processing unit the instruction forms a critical path. 
     
     
       15. A method as claimed in  claim 10 , wherein the sensing and determining take place at least one clock cycle before any processing is implemented using the instruction.