Inventor
JIANG HSIN-CHIN
TW26 patents
⚠️ This page may combine multiple inventors who share the name “JIANG HSIN-CHIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IND TECH RES INST
15 patentsUS6448641B2Sep 10, 2002
Low-capacitance bonding pad for semiconductor device
IND TECH RES INST85 citations98
US6882009B2Apr 19, 2005
Electrostatic discharge protection device and method of manufacturing the same
IND TECH RES INST23 citations92
US6815775B2Nov 9, 2004
ESD protection design with turn-on restraining method and structures
IND TECH RES INST44 citations92
US6747501B2Jun 8, 2004
Dual-triggered electrostatic discharge protection circuit
IND TECH RES INST37 citations92
US6717238B2Apr 6, 2004
Low-capacitance bonding pad for semiconductor device
IND TECH RES INST27 citations92
US6690067B2Feb 10, 2004
ESD protection circuit sustaining high ESD stress
IND TECH RES INST42 citations92
US6633087B2Oct 14, 2003
Low-capacitance bonding pad for semiconductor device
IND TECH RES INST34 citations92
US6465283B1Oct 15, 2002
Structure and fabrication method using latch-up implantation for improving latch-up immunity in CMOS fabrication process
IND TECH RES INST46 citations92
US6838908B2Jan 4, 2005
Mixed-voltage I/O design with novel floating N-well and gate-tracking circuits
IND TECH RES INST12 citations84
US6747861B2Jun 8, 2004
Electrostatic discharge protection for a mixed-voltage device using a stacked-transistor-triggered silicon controlled rectifier
IND TECH RES INST15 citations84
US7253453B2Aug 7, 2007
Charge-device model electrostatic discharge protection using active device for CMOS circuits
IND TECH RES INST12 citations83
US6576974B1Jun 10, 2003
Bipolar junction transistors for on-chip electrostatic discharge protection and methods thereof
IND TECH RES INST9 citations74
US7092227B2Aug 15, 2006
Electrostatic discharge protection circuit with active device
IND TECH RES INST8 citations73
US6335698B1Jan 1, 2002
Programmable analog-to-digital converter with programmable non-volatile memory cells
IND TECH RES INST4 citations63
US6633068B2Oct 14, 2003
Low-noise silicon controlled rectifier for electrostatic discharge protection
IND TECH RES INST0 citations52
KER MING-DOU
8 patentsUS7675724B2Mar 9, 2010
Electrostatic discharge protection device for mixed voltage interface
KER MING-DOU9 citations84
US7253999B2Aug 7, 2007
On-chip latch-up protection circuit
KER MING-DOU14 citations83
US7394630B2Jul 1, 2008
Electrostatic discharge protection device for mixed voltage interface
KER MING-DOU6 citations74
US7663853B2Feb 16, 2010
On-chip latch-up protection circuit
KER MING-DOU6 citations68
USRE43215EFeb 28, 2012
ESD protection design with turn-on restraining method and structures
KER MING-DOU5 citations62
US8116049B2Feb 14, 2012
Transient voltage detection circuit
KER MING-DOU3 citations62
US7554159B2Jun 30, 2009
Electrostatic discharge protection device and method of manufacturing the same
KER MING-DOU4 citations62
US8067952B2Nov 29, 2011
System-level ESD detection circuit
KER MING-DOU1 citations51