Inventor

WELLS DAVID H

US144 patents

⚠️ This page may combine multiple inventors who share the name “WELLS DAVID H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WELLS DAVID H

MICRON TECHNOLOGY INC

Reverse construction memory cell

Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures

Methods of fabricating intermediate semiconductor structures by selectively etching pockets of implanted silicon

Methods for forming arrays of small, closely spaced features

Method and apparatus for adjusting feature size and position

Memory array buried digit line

Memory array buried digit line

Methods of forming semiconductor-on-insulator substrates, and integrated circuitry

Methods of shaping vertical single crystal silicon walls and resulting structures

Wet etch suitable for creating square cuts in si

Methods of forming transistor devices

Epitaxial silicon growth

Apparatuses including cross point memory arrays and biasing schemes

Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures

Methods of forming transistors

Methods of forming imager systems

Memory cell, device, and system

Apparatus and method for forming features on a substrate

Method of patterning a semiconductor device

Integrated circuitry

Method of forming a self-aligned field extraction grid

Transistors and arrays of elevationally-extending strings of memory cells

Methods of forming a channel region of a transistor and methods used in forming a memory array

Semiconductor devices and systems containing nanofluidic channels

Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures

Methods for forming arrays of small, closely spaced features

Semiconductor structures including square cuts in single crystal silicon

Epitaxial silicon growth

Method for forming memory cell and device

Methods of forming patterned constructions, methods of patterning semiconductive substrates, and methods of forming field emission displays

Methods of forming a span comprising silicon dioxide

WELLS DAVID H

Integrated circuit with buried digit line

Cross-point memory devices, electronic systems including cross-point memory devices and methods of accessing a plurality of memory cells in a cross-point memory array

Methods for forming arrays of small, closely spaced features

Cross-point memory devices, electronic systems including cross-point memory devices and methods of accessing a plurality of memory cells in a cross-point memory array

Memory array buried digit line

Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures

Method for adjusting feature size and position

Semiconductor substrates with undercut structures

Methods for forming arrays of small, closely spaced features

Epitaxial silicon growth

Integrated circuitry

Methods of forming a span comprising silicon dioxide

Resistive memory and methods of processing resistive memory

LIU ZENGTAO T

Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells

MICRON TECHNOLOGIES INC

Memory array buried digit line

OVONYX MEMORY TECH LLC

Semiconductor memory devices including a memory array and related method incorporating different biasing schemes

LIU JUN

Methods of forming vertical field-effect transistor with self-aligned contacts for memory devices with planar periphery/array and intermediate structures formed thereby

TANG SANH D

Semiconductor structures including bodies of semiconductor material, devices including such structures and related methods

FUCSKO JANOS

Single crystal silicon structures