Inventor
DEFORGE JOHN B
US17 patents
⚠️ This page may combine multiple inventors who share the name “DEFORGE JOHN B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS10109639B1Oct 23, 2018
Lateral non-volatile storage cell
IBM12 citations84
US9673116B2Jun 6, 2017
On chip electrostatic discharge (ESD) event monitoring
IBM6 citations72
US10740177B2Aug 11, 2020
Optimizing error correcting code in three-dimensional stacked memory
IBM2 citations70
US11146251B2Oct 12, 2021
Performance-screen ring oscillator with switchable features
IBM2 citations69
US9472269B2Oct 18, 2016
Stress balancing of circuits
IBM2 citations62
US6570254B1May 27, 2003
Electrical mask identification of memory modules
IBM2 citations59
US11462295B2Oct 4, 2022
Microchip level shared array repair
IBM0 citations55
US10153291B1Dec 11, 2018
Lateral non-volatile storage cell
IBM0 citations52
US8860113B2Oct 14, 2014
Creating deep trenches on underlying substrate
IBM0 citations51
US9437670B2Sep 6, 2016
Light activated test connections
IBM0 citations49
US6268228B1Jul 31, 2001
Electrical mask identification of memory modules
IBM0 citations49
US11067895B2Jul 20, 2021
Method and structures for personalizing lithography
IBM0 citations47
US10534545B2Jan 14, 2020
Three-dimensional stacked memory optimizations for latency and power
IBM0 citations41
US10528288B2Jan 7, 2020
Three-dimensional stacked memory access optimization
IBM0 citations41
US10254340B2Apr 9, 2019
Independently driving built-in self test circuitry over a range of operating conditions
IBM0 citations37