Inventor
DENG JIE
US39 patents
⚠️ This page may combine multiple inventors who share the name “DENG JIE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
PSEMI CORP
5 patentsUS10790390B2Sep 29, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PSEMI CORP14 citations94
US10074746B2Sep 11, 2018
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink—harmonic wrinkle reduction
PSEMI CORP23 citations94
US10797172B2Oct 6, 2020
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PSEMI CORP10 citations92
US11011633B2May 18, 2021
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PSEMI CORP5 citations84
US12074217B2Aug 27, 2024
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PSEMI CORP2 citations73
IBM
4 patentsUS9590106B1Mar 7, 2017
Semiconductor device including epitaxially formed buried channel region
IBM2 citations73
US9595598B1Mar 14, 2017
Semiconductor device including epitaxially formed buried channel region
IBM1 citations63
US10374042B2Aug 6, 2019
Semiconductor device including epitaxially formed buried channel region
IBM0 citations52
US9679969B2Jun 13, 2017
Semiconductor device including epitaxially formed buried channel region
IBM0 citations52
QUALCOMM INC
4 patentsUS10247617B2Apr 2, 2019
Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs)
QUALCOMM INC2 citations72
US10892322B2Jan 12, 2021
Circuits employing a double diffusion break (DDB) and single diffusion break (SDB) in different type diffusion region(s), and related fabrication methods
QUALCOMM INC1 citations63
US10636737B2Apr 28, 2020
Structure and method of metal wraparound for low via resistance
QUALCOMM INC1 citations61
US10847507B2Nov 24, 2020
Contact liner to enable different CPP devices
QUALCOMM INC0 citations40
PEREGRINE SEMICONDUCTOR CORP
3 patentsUS9786781B2Oct 10, 2017
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PEREGRINE SEMICONDUCTOR CORP29 citations97
US9653601B2May 16, 2017
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PEREGRINE SEMICONDUCTOR CORP29 citations97
US9087899B2Jul 21, 2015
Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
PEREGRINE SEMICONDUCTOR CORP44 citations94