Inventor

DO NHAN

US188 patents

⚠️ This page may combine multiple inventors who share the name “DO NHAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DO NHAN

SILICON STORAGE TECH INC

Method of making split gate non-volatile memory cell with 3D FinFET structure

Memory device and method for varying program state separation based upon frequency of use

Flash memory array with individual memory cell read, program and erase

Non-volatile memory array with concurrently formed low and high voltage logic devices

High precision and highly efficient tuning mechanisms and algorithms for analog neuromorphic memory in artificial neural networks

Precise data tuning method and apparatus for analog neural memory in an artificial neural network

Power management for an analog neural memory in a deep learning artificial neural network

Testing circuitry and methods for analog neural memory in artificial neural network

Split-gate non-volatile memory cells with erase gates disposed over word line gates, and method of making same

Split gate non-volatile memory cells with FinFET structure and HKMG memory and logic gates, and method of making same

Two transistor FinFET-based split gate non-volatile floating gate flash memory and method of fabrication

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

Deep learning neural network classifier using non-volatile memory array

Neural network classifier using array of three-gate non-volatile memory cells

Anti-hacking mechanisms for flash memory device

Configurable analog neural memory system for deep learning neural network

Precision tuning for the programming of analog neural memory in a deep learning artificial neural network

Non-volatile split gate memory cells with integrated high K metal control gates and method of making same

Neural network classifier using array of two-gate non-volatile memory cells

Split gate non-volatile memory cells and logic devices with FinFET structure, and method of making same

Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network

Split-gate flash memory cell with varying insulation gate oxides, and method of forming same

Flash memory array with individual memory cell read, program and erase

Split gate non-volatile flash memory cell having metal gates

Method of forming pairs of three-gate non-volatile flash memory cells using two polysilicon deposition steps

Method of integrating FinFET CMOS devices with embedded nonvolatile memory cells

Split gate non-volatile flash memory cell having metal gates and method of making same

Split-gate, twin-bit non-volatile memory cell

Method of forming self-aligned split-gate memory cell array with metal gates and logic devices

Split gate non-volatile memory cell with 3D finFET structure, and method of making same

Non-volatile split gate memory cells with integrated high K metal gate, and method of making same

Method of forming split-gate memory cell array along with low and high voltage logic devices

Method of making embedded memory device with silicon-on-insulator substrate

Non-volatile memory cell with self aligned floating and erase gates, and method of making same

Flash memory system with EEPROM functionality

Method of operating a split gate flash memory cell with coupling gate

Output circuits for an analog neural memory system for deep learning neural network

Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism

Neural network classifier using array of three-gate non-volatile memory cells

Method of forming a device with split gate non-volatile memory cells, HV devices having planar channel regions and FINFET logic devices

Programming analog neural memory cells in deep learning artificial neural network

Temperature compensation in an analog memory array by changing a threshold voltage of a selected memory cell in the array

Configurable input blocks and output blocks and physical layout for analog neural memory in deep learning artificial neural network

System for converting neuron current into neuron current-based time pulses in an analog neural memory in a deep learning artificial neural network

Compensation for reference transistors and memory cells in analog neuro memory in deep learning artificial neural network

Neural network classifier using array of stacked gate non-volatile memory cells

Method and apparatus for programming analog neural memory in a deep learning artificial neural network

DO NHAN

Non-volatile memory cell with self aligned floating and erase gates, and method of making same

Method of operating a split gate flash memory cell with coupling gate

LIU XIAN

Method of forming a memory cell by reducing diffusion of dopants under a gate