Inventor
GIEBEL BURKHARD
DE19 patents
⚠️ This page may combine multiple inventors who share the name “GIEBEL BURKHARD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ITT IND GMBH DEUTSCHE
7 patentsUS4733394AMar 22, 1988
Electrically programmable semiconductor memory showing redundance
ITT IND GMBH DEUTSCHE173 citations98
US5451861ASep 19, 1995
Method of setting the output current of a monolithic integrated pad driver
ITT IND GMBH DEUTSCHE25 citations92
US5326994AJul 5, 1994
Protective circuit for protecting contacts of monolithic integrated circuits by preventing parasitic latch up with other integrated circuit elements
ITT IND GMBH DEUTSCHE30 citations90
US4922139AMay 1, 1990
Filter circuit for generating a VCO control voltage responsive to the output signals from a frequency/phase discriminator
ITT IND GMBH DEUTSCHE9 citations73
US4882610ANov 21, 1989
Protective arrangement for MOS circuits
ITT IND GMBH DEUTSCHE2 citations63
US4803657AFeb 7, 1989
Serial first-in-first-out (FIFO) memory and method for clocking the same
ITT IND GMBH DEUTSCHE4 citations63
US5608346AMar 4, 1997
MOS driver circuit for suppressing interference by preventing shunt currents
ITT IND GMBH DEUTSCHE5 citations62
ITT
6 patentsUS4750158AJun 7, 1988
Integrated matrix of nonvolatile, reprogrammable storage cells
ITT46 citations92
US4597064AJun 24, 1986
Electrically programmable memory matrix
ITT15 citations73
US4527256AJul 2, 1985
Electrically erasable memory matrix (EEPROM)
ITT19 citations73
US4524429AJun 18, 1985
Integrated memory matrix comprising nonvolatile reprogrammable storage cells
ITT8 citations73
US4502131AFeb 26, 1985
Electrically programmable memory matrix
ITT12 citations73
US4742253AMay 3, 1988
Integrated insulated-gate field-effect transistor circuit for evaluating the voltage of a node to be sampled against a fixed reference voltage
ITT4 citations62
SIEMENS AG
4 patentsUS4388541AJun 14, 1983
Circuit arrangement with MOS-transistors for the rapid evaluation of the logic state of a sampling node
SIEMENS AG8 citations73
US4458338AJul 3, 1984
Circuit for checking memory cells of programmable MOS-integrated semiconductor memories
SIEMENS AG12 citations70
US4435789AMar 6, 1984
Circuit for a read-only memory organized in rows and columns to prevent bit line potentials from dropping
SIEMENS AG8 citations70
US4459608AJul 10, 1984
Reprogrammable semiconductor read-only memory of the floating-gate type
SIEMENS AG3 citations60