Inventor

THOMPSON SCOTT E

US61 patents

⚠️ This page may combine multiple inventors who share the name “THOMPSON SCOTT E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

THOMPSON SCOTT E

MIE FUJITSU SEMICONDUCTOR LTD

Porting a circuit design from a first semiconductor process to a second semiconductor process

Buried channel deeply depleted channel transistor

High uniformity screen and epitaxial layers for CMOS devices

Transistor with threshold voltage set notch and method of fabrication thereof

Low power semiconductor transistor structure and method of fabrication thereof

Electronic devices and systems, and methods for making and using the same

Electronic devices and systems, and methods for making and using same

Low power semiconductor transistor structure and method of fabrication thereof

Buried channel deeply depleted channel transistor

Method for fabricating a transistor with reduced junction leakage current

Digital circuits having improved transistors, and methods therefor

Integrated circuit devices and methods

Integrated circuit devices and methods

CMOS gate stack structures and processes

Advanced transistors with punch through suppression

Digital circuits having improved transistors, and methods therefor

Electronic devices and systems, and methods for making and using the same

Buried channel deeply depleted channel transistor

Digital circuits having improved transistors, and methods therefor

Integrated circuit devices and methods

THOMPSON SCOTT E

Electronic devices and systems, and methods for making and using the same

Electronic devices and systems, and methods for making and using the same

Electronic devices and systems, and methods for making and using the same

Electronic devices and systems, and methods for making and using the same

Transistor having reduced junction leakage and methods of forming thereof

Digital circuits having improved transistors, and methods therefor

Monitoring and measurement of thin film layers

CMOS structures and processes based on selective thinning

SUVOLTA INC

Semiconductor devices having fin structures and fabrication methods thereof

Electronic devices and systems, and methods for making and using the same

Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom

Deeply depleted MOS transistors having a screening layer and methods thereof

Porting a circuit design from a first semiconductor process to a second semiconductor process

Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer

SHIFREN LUCIAN

Process for manufacturing an improved analog transistor

Advanced transistors with punch through suppression

Low power semiconductor transistor structure and method of fabrication thereof

Method for fabricating multiple transistor devices on a substrate with varying threshold voltages

INTEL CORP

Channel dopant implantation with automatic compensation for variations in critical dimension

Process for forming doped regions from solid phase diffusion source

Two step source/drain anneal to prevent dopant evaporation

CLARK LAWRENCE T

Integrated circuit devices and methods

Porting a circuit design from a first semiconductor process to a second semiconductor process

Analog circuits having improved transistors, and methods therefor

HOFFMANN THOMAS

CMOS gate stack structures and processes

Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer

UNITED SEMICONDUCTOR JAPAN CO LTD

Electronic devices and systems, and methods for making and using the same

Electronic devices and systems, and methods for making and using the same

ARGHAVANI REZA

Transistor with threshold voltage set notch and method of fabrication thereof

UNIV FLORIDA

Methods and articles incorporating local stress for performance improvement of strained semiconductor devices