Inventor

MALLIKARJUNASWAMY SHEKAR

US80 patents

⚠️ This page may combine multiple inventors who share the name “MALLIKARJUNASWAMY SHEKAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MALLIKARJUNASWAMY SHEKAR

ALPHA & OMEGA SEMICONDUCTOR

Semiconductor device employing trenches for active gate and isolation

Vertical trench LDMOS transistor

Short channel lateral MOSFET and method

Lateral PNP bipolar transistor with narrow trench emitter

JEFT and LDMOS transistor formed using deep diffusion regions

Circuit configuration and manufacturing processes for vertical transient voltage suppressor (TVS) and EMI filter

Forming JFET and LDMOS transistor in monolithic power integrated circuit using deep diffusion regions

EOS protection for integrated circuits

Lateral PNP bipolar transistor formed with multiple epitaxial layers

Active ESD protection circuit

Three-dimensional high voltage gate driver integrated circuit

Dual channel trench LDMOS transistors and transistors integrated therewith

Electrostatic discharge (ESD) protection applying high voltage lightly doped drain (LDD) CMOS technologies

Dual channel trench LDMOS transistors with drain superjunction structure integrated therewith

Top drain LDMOS

Lateral PNP bipolar transistor with narrow trench emitter

Compact CMOS device isolation

Active ESD protection circuit

Floating guard ring for HV interconnect

MICREL INC

JFET controlled schottky barrier diode

Lateral DMOS transistor with a self-aligned drain region

Thick gate oxide transistor and electrostatic discharge protection utilizing thick gate oxide transistors

Localized electrostatic discharge protection for integrated circuit input/output pads

Seal ring for mixed circuitry semiconductor devices

Ballast resistors for transistor devices

Insulated gate bipolar transistor and electrostatic discharge cell protection utilizing insulated gate bipolar transistors

LDMOS gate controlled schottky diode

Increasing switching speed of geometric construction gate MOSFET structures

Seal ring for mixed circuitry semiconductor devices

MOS field effect transistor with reduced parasitic substrate conduction

Bipolar junction transistor with reduced parasitic bipolar conduction

ESD protection device for enhancing reliability and for providing control of ESD trigger voltage

Electrostatic discharge protection for integrated semiconductor devices using channel stop field plates

MALLIKARJUNASWAMY SHEKAR

Transient voltage suppressor (TVS) with improved clamping voltage

Transient voltage suppressor (TVS) with improved clamping voltage

Dual channel trench LDMOS transistors and BCD process with deep trench isolation

Lateral PNP bipolar transistor with narrow trench emitter

Three-dimensional high voltage gate driver integrated circuit

Circuit configurations to reduce snapback of a transient voltage suppressor

Short channel lateral MOSFET and method

Circuit configurations to reduce snapback of a transient voltage suppressor

Top drain LDMOS

Lateral PNP bipolar transistor formed with multiple epitaxial layers

ALPHA & OMEGA SEMICONDUCTOR CAYMAN LTD

Low capacitance bidirectional transient voltage suppressor

Low capacitance transient voltage suppressor including a punch-through silicon controlled rectifier as low-side steering diode

Low capacitance bidirectional transient voltage suppressor

Low capacitance transient voltage suppressor

Low capacitance bidirectional transient voltage suppressor

Low capacitance transient voltage suppressor with a mos-triggered silicon controlled rectifier as high-side steering diode

IMPALA LINEAR CORP

Short-circuit current-limit circuit