Inventor

ALBONESI DAVID H

US9 patents

⚠️ This page may combine multiple inventors who share the name “ALBONESI DAVID H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UNIV ROCHESTER

2 patents

US6205537B1Mar 20, 2001

Mechanism for dynamically adapting the complexity of a microprocessor

UNIV ROCHESTER101 citations96

USRE42213EMar 8, 2011

Dynamic reconfigurable memory hierarchy

UNIV ROCHESTER3 citations62

PRIME COMPUTER INC

2 patents

US5113514AMay 12, 1992

System bus for multiprocessor computer system

PRIME COMPUTER INC102 citations94

US5170113ADec 8, 1992

Electric cable connection error-detect method and apparatus

PRIME COMPUTER INC23 citations91

UNIV CORNELL

2 patents

US10371405B2Aug 6, 2019

Building power management systems

UNIV CORNELL8 citations74

US10088891B2Oct 2, 2018

Multi-core computer processor based on a dynamic core-level power management for enhanced overall power efficiency

UNIV CORNELL0 citations31

PRIME COMPUTER

1 patent

US5119486AJun 2, 1992

Memory board selection method and apparatus

PRIME COMPUTER36 citations89

IBM

1 patent

US7865747B2Jan 4, 2011

Adaptive issue queue for reduced power at high performance

IBM11 citations84

DWARKADAS SANDHYA

1 patent

USRE41958ENov 23, 2010

Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures

DWARKADAS SANDHYA2 citations60