Inventor

RANDOLPH MARK

US49 patents

⚠️ This page may combine multiple inventors who share the name “RANDOLPH MARK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RANDOLPH MARK

SPANSION LLC

Memory cell having enhanced high-K dielectric

Flash memory cell and methods for programming and erasing

Methods and systems for high write performance in multi-bit flash memory devices

One stack with steam oxide for charge retention

LDC implant for mirrorbit to improve Vt roll-off and form sharper junction

Methods and systems for high write performance in multi-bit flash memory devices

High K stack for non-volatile memory

Self-aligned STI SONOS

Flash memory cell and methods for programming and erasing

Flash memory programming and verification with reduced leakage current

Methods and systems for reducing the threshold voltage distribution following a memory cell erase

Strapping contact for charge protection

Variable salicide block for resistance equalization in an array

Select transistor using buried bit line from core

Multi-phase wordline erasing for flash memory

Flash memory programming and verification with reduced leakage current

System and method for reducing process-induced charging

System and method for reducing process-induced charging

P-channel NAND in isolated N-well

High K stack for non-volatile memory

Oxygen elimination for device processing

Method for determining wordline critical dimension in a memory array and related structure

Method and apparatus for protection against process-induced charging

ADVANCED MICRO DEVICES INC

Process for fabricating an integrated circuit with a self-aligned contact

Ramp source hot-hole programming for trap based non-volatile memory devices

Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory

Diode fabrication for ESD/EOS protection

Use of a large angle implant and current structure for eliminating a critical mask in flash memory processing

Method and system for gate stack reoxidation control

NROM cell with N-less channel

Non-self-aligned side channel implants for flash memory cells

Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices

Method and system for selected source during read and programming of flash memory

Process for fabricating an integrated circuit with a self-aligned contact

ESD implant following spacer deposition

Planar transistor structure using isolation implants for improved Vss resistance and for process simplification

Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices

MOTOROLA INC

Dialog recognition and control in a voice browser

Method and apparatus to facilitate correlating symbols to sounds

Method and apparatus for speech detection using time-frequency variance

SPANSION L L C

System and method for erasing a memory cell

System and method for protecting semiconductor devices

GEN HOSPITAL CORP

Bonding of cartilage pieces using isolated chondrocytes and a biological gel

CHAN BARBARA

Photochemical tissue bonding

ROGERS DAVID M

Method and apparatus for protection against process-induced charging

BASSETT ERIK

Engineered craniofacial constructs with composite scaffold

ZHENG WEI

Strapping contact for charge protection

DING MENG

Memory cell system using silicon-rich nitride

MARTIROSIAN ASHOT MELIK

System and method for reducing process-induced charging