Inventor

PARKINSON WARD D

US55 patents

⚠️ This page may combine multiple inventors who share the name “PARKINSON WARD D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PARKINSON WARD D

MICRON TECHNOLOGY INC

Sense amplifier pulldown device with tailored edge input

Multiport RAM based multiprocessor

Chip decoupling capacitor

Image sensor using dynamic random access memory

Mask write enablement for memory devices which permits selective masked enablement of plural segments

Memory module having on-chip surge capacitors

Parity and error correction coding on integrated circuit addresses

Multiport RAM based multiprocessor

Integrated circuit module having on-chip surge capacitors

Split-polysilicon CMOS process incorporating unmasked punchthrough and source/drain implants

Pull up circuit for sense lines in a semiconductor memory

Semi-smart DRAM controller IC to provide a pseudo-cache mode of operation using standard page mode draws

Die-mounting paddle for mechanical stress reduction in plastic IC packages

Chip decoupling capacitor

Integrated circuit module having on-chip surge capacitors

Active up-pump for semiconductor sense lines

Chip decoupling capacitor

Improved device for sensing information store in a dynamic memory

Reduced latchup in precharging I/O lines to sense amp signal levels

Pull up circuit for digit lines in a semiconductor memory

OVONYX INC

Detecting switching of access elements of phase change memory cells

Technique and apparatus for performing write operations to a phase change material memory device

Using a phase change memory as a high volume memory

Detecting switching of access elements of phase change memory cells

Reading phase change memories

Reading a phase change memory

Programming a normally single phase chalcogenide material for use as a memory of FPLA

Reading phase change memories without triggering reset cell threshold devices

Using higher current to read a triggered phase change memory

Reading a phase change memory

Immunity of phase change material to disturb in the amorphous phase

Analog phase change memory

Static random access memory cell using chalcogenide

Seasoning phase change memories

Immunity of phase change material to disturb in the amorphous phase

INTEL CORP

Memory having access devices using phase change material such as chalcogenide

Refreshing memory cells of a phase change material memory device

Read bias scheme for phase change memories

Programming a normally single phase chalcogenide material for use as a memory or FPLA

Accessing phase change memories

LOWREY TYLER

Using a bit specific reference level to read a memory

Using a bit specific reference level to read a resistive memory

Method for using a bit specific reference level to read a phase change memory

PARKINSON WARD D

Reading a phase change memory

Reading phase change memories

OVOYNX INC

Method and system to store information

MOSTEK CORP

Backup power circuit for biasing bit lines of a static semiconductor memory

MOTOROLA INC

Integrated circuit substrate charge pump

OVONYX MEMORY TECH LLC

Immunity of phase change material to disturb in the amorphous phase

KARPOV ILYA V

Read window in chalcogenide semiconductor memories