Inventor
LIN CHENG-CHUNG
TW48 patents
⚠️ This page may combine multiple inventors who share the name “LIN CHENG-CHUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG
21 patentsUS7176137B2Feb 13, 2007
Method for multiple spacer width control
TAIWAN SEMICONDUCTOR MFG101 citations98
US6372661B1Apr 16, 2002
Method to improve the crack resistance of CVD low-k dielectric constant material
TAIWAN SEMICONDUCTOR MFG60 citations96
US6407013B1Jun 18, 2002
Soft plasma oxidizing plasma method for forming carbon doped silicon containing dielectric layer with enhanced adhesive properties
TAIWAN SEMICONDUCTOR MFG43 citations93
US6383935B1May 7, 2002
Method of reducing dishing and erosion using a sacrificial layer
TAIWAN SEMICONDUCTOR MFG45 citations93
US6943077B2Sep 13, 2005
Selective spacer layer deposition method for forming spacers with different widths
TAIWAN SEMICONDUCTOR MFG24 citations92
US6746900B1Jun 8, 2004
Method for forming a semiconductor device having high-K gate dielectric material
TAIWAN SEMICONDUCTOR MFG17 citations84
US6645864B1Nov 11, 2003
Physical vapor deposition of an amorphous silicon liner to eliminate resist poisoning
TAIWAN SEMICONDUCTOR MFG18 citations84
US9378926B2Jun 28, 2016
Electron beam lithography methods including time division multiplex loading
TAIWAN SEMICONDUCTOR MFG10 citations83
US8941085B2Jan 27, 2015
Electron beam lithography systems and methods including time division multiplex loading
TAIWAN SEMICONDUCTOR MFG9 citations83
US6955984B2Oct 18, 2005
Surface treatment of metal interconnect lines
TAIWAN SEMICONDUCTOR MFG12 citations81
US7271103B2Sep 18, 2007
Surface treated low-k dielectric as diffusion barrier for copper metallization
TAIWAN SEMICONDUCTOR MFG8 citations74
US9287171B2Mar 15, 2016
Method of making a conductive pillar bump with non-metal sidewall protection structure
TAIWAN SEMICONDUCTOR MFG3 citations73
US6794295B1Sep 21, 2004
Method to improve stability and reliability of CVD low K dielectric
TAIWAN SEMICONDUCTOR MFG6 citations63
US8053894B2Nov 8, 2011
Surface treatment of metal interconnect lines
TAIWAN SEMICONDUCTOR MFG3 citations62
US8592300B2Nov 26, 2013
Interface structure for copper-copper peeling integrity
TAIWAN SEMICONDUCTOR MFG2 citations57
US6197706B1Mar 6, 2001
Low temperature method to form low k dielectric
TAIWAN SEMICONDUCTOR MFG4 citations57
US9281288B2Mar 8, 2016
System and method for fine pitch PoP structure
TAIWAN SEMICONDUCTOR MFG1 citations52
US8344506B2Jan 1, 2013
Interface structure for copper-copper peeling integrity
TAIWAN SEMICONDUCTOR MFG0 citations52
US9202662B2Dec 1, 2015
Charged particle lithography system with a long shape illumination beam
TAIWAN SEMICONDUCTOR MFG0 citations51
US9286970B2Mar 15, 2016
Memory circuit for pre-charging and write driving
TAIWAN SEMICONDUCTOR MFG1 citations50
US7011929B2Mar 14, 2006
Method for forming multiple spacer widths
TAIWAN SEMICONDUCTOR MFG0 citations42
TAIWAN SEMICONDUCTOR MFG CO LTD
7 patentsUS9449931B2Sep 20, 2016
Pillar bumps and process for making same
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations73
US11270052B2Mar 8, 2022
System and method of timing characterization for semiconductor circuit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US9846755B2Dec 19, 2017
Method for cell placement in semiconductor layout and system thereof
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations52
US10824784B2Nov 3, 2020
System and method of timing characterization for semiconductor circuit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations51
US9362899B2Jun 7, 2016
Clock regenerator
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations51
US9679915B2Jun 13, 2017
Integrated circuit with well and substrate contacts
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations50
US9495495B2Nov 15, 2016
Scan cell assignment
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations39
LIN CHENG-CHUNG
4 patentsUS8823166B2Sep 2, 2014
Pillar bumps and process for making same
LIN CHENG-CHUNG25 citations92
US8900922B2Dec 2, 2014
Fine-pitch package-on-package structures and methods for forming the same
LIN CHENG-CHUNG11 citations83
US8674496B2Mar 18, 2014
System and method for fine pitch PoP structure
LIN CHENG-CHUNG5 citations83
US8269549B2Sep 18, 2012
Power supply circuit for PCI-E slot
LIN CHENG-CHUNG3 citations62
HWANG CHIEN LING
4 patentsUS8317077B2Nov 27, 2012
Thermal compressive bonding with separate die-attach and reflow processes
HWANG CHIEN LING22 citations92
US8258055B2Sep 4, 2012
Method of forming semiconductor die
HWANG CHIEN LING38 citations92
US8104666B1Jan 31, 2012
Thermal compressive bonding with separate die-attach and reflow processes
HWANG CHIEN LING29 citations92
US8177862B2May 15, 2012
Thermal compressive bond head
HWANG CHIEN LING7 citations84
VIA LABS INC
3 patentsUS11768786B2Sep 26, 2023
Connection interface conversion chip, connection interface conversion device and operation method
VIA LABS INC0 citations60
US11386030B2Jul 12, 2022
Connection interface conversion chip, connection interface conversion device and operation method
VIA LABS INC1 citations60
US11176074B2Nov 16, 2021
Chip and interface conversion device
VIA LABS INC0 citations45