Inventor

WATANABE SHIGEYOSHI

JP32 patents

⚠️ This page may combine multiple inventors who share the name “WATANABE SHIGEYOSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WATANABE SHIGEYOSHI

TOSHIBA KK

Semiconductor device with vertical transistors connected in series between bit lines

Dynamic random access memory device with the combined open/folded bit-line pair arrangement

Dynamic random access memory device with the combined open/folded bit-line pair arrangement

Dynamic random access memory device with the combined open/folded bit-line pair arrangement

Divided-bit line type dynamic semiconductor memory with main and sub-sense amplifiers

NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines

Dynamic random access memory device with the combined open/folded bit-line pair arrangement

NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines

Electrically erasable programmable read-only memory with NAND memory cell structure

Electrically erasable programmable read-only memory with NAND memory cell structure

High-speed refreshing rechnique for highly-integrated random-access memory

Word line driver for use in a semiconductor memory

Dynamic random access memory device

Non-volatile semiconductor memory with NAND cell structure and switching transistors with different channel lengths to reduce punch-through

Dynamic semiconductor memory device having high integration density

Dynamic semiconductor memory device

Dynamic random access memory device with the combined open/folded bit-line pair arrangement

Semiconductor device including a bipolar transistor biased to produce a negative base current by the impact ionization mechanism

Semiconductor memory device

Mos-type charging circuit

Semiconductor memory device having a bicmos memory cell

Semiconductor memory device

Semiconductor memory device

Single transistor/capacitor semiconductor memory device and method for manufacture

Process for forming arrayed field effect transistors highly integrated on substrate

Semiconductor device

Semiconductor memory device having register groups for writing and reading data

Semiconductor device

TOKYO SHIBAURA ELECTRIC CO

Nonvolatile read only memory device

Semiconductor nonvolatile read only memory device

KABUSHIKI KASIHA TOSHIBA

Semiconductor memory system with dynamic random access memory cells

WATANABE SHIGEYOSHI

Cruise control system using instruction sent from switch