Inventor

TANG SANH D

US271 patents

⚠️ This page may combine multiple inventors who share the name “TANG SANH D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TANG SANH D

MICRON TECHNOLOGY INC

Integrated structures comprising vertical channel material and having conductively-doped semiconductor material directly against lower sidewalls of the channel material

Methods of forming recessed access devices associated with semiconductor constructions

Method of fabricating a vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array

Methods of forming a field effect transistor having source/drain material over insulative material

Method of forming field effect transistors

Memory arrays

Charge storage apparatus and methods

Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells

Integrated circuits and methods of forming a field effect transistor

Methods of forming semiconductor constructions

One-transistor memory cell with bias gate

Transistor devices, transistor structures and semiconductor constructions

Method of forming a field effect transistor

Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array

Vertical access devices, semiconductor device structures, and related methods

Methods of forming an elevationally extending conductor laterally between a pair of conductive lines

Integrated structures comprising channel material extending into source material

Three dimensional memory and methods of forming the same

Methods of forming integrated structures comprising vertical channel material and having conductively-doped semiconductor material directly against lower sidewalls of the channel material

Three dimensional memory and methods of forming the same

Three dimensional memory and methods of forming the same

Methods of fabricating fin structures

Method of forming a field effect transistor having source/drain material over insulative material

Arrays of vertically stacked tiers of non-volatile cross point memory cells and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells

Methods, devices, and systems relating to memory cells having a floating body

System and method for fabricating a fin field effect transistor

Transistor structures

Methods of forming field effect transistor gate lines

Method of forming a field effect transistor

Method for forming an integrated circuit interconnect using a dual poly process

Methods of forming trench isolation within a semiconductor substrate including, Tshaped trench with spacers

Method for forming an integrated circuit interconnect using a dual poly process

Method for making semiconductor devices having contact plugs and local interconnects

Method for forming an integrated circuit interconnect using a dual poly process

Using silicide cap as an etch stop for multilayer metal process and structures so formed

TANG SANH D

Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells

Integrated memory arrays

Methods of forming memory cells

Three dimensional memory and methods of forming the same

Semiconductor charge storage apparatus and methods

Memory cells, memory arrays, methods of forming memory cells, and methods of forming a shared doped semiconductor region of a vertically oriented thyristor and a vertically oriented access transistor

Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same

Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same

Methods, structures and devices for increasing memory density

Thyristor based memory cells, devices and systems including the same and methods for forming the same

Methods of forming semiconductor constructions

PAREKH KUNAL R

Methods of forming recessed access devices associated with semiconductor constructions

FISCHER MARK

Methods of forming pluralities of vertical transistors, and methods of forming memory arrays

SANDHU GURTEJ S

Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells

RAMASWAMY D V NIRMAL

Methods of forming resistive memory elements