Methods of forming memory cells

Abstract

Some embodiments include methods of forming memory cells. A series of rails is formed to include bottom electrode contact material. Sacrificial material is patterned into a series of lines that cross the series of rails. A pattern of the series of lines is transferred into the bottom electrode contact material. At least a portion of the sacrificial material is subsequently replaced with top electrode material. Some embodiments include memory arrays that contain a second series of electrically conductive lines crossing a first series of electrically conductive lines. Memory cells are at locations where the electrically conductive lines of the second series overlap the electrically conductive lines of the first series. First and second memory cell materials are within the memory cell locations. The first memory cell material is configured as planar sheets and the second memory cell material is configured as upwardly-opening containers.

We claim: 
     
       1. A method of forming a plurality of memory cells, comprising:
 forming a series of rails extending along a first direction, individual rails extending along multiple memory cell locations, the individual rails comprising bottom electrode contact material over electrically conductive lines, the electrically conductive lines being a first series of lines; 
 forming an expanse of sacrificial material extending across the rails; 
 patterning the sacrificial material into a second series of lines extending along a second direction that crosses the first direction; 
 transferring a pattern of the second series of lines into the bottom electrode contact material to singulate the bottom electrode contact material into segments associated with only single memory cell locations; 
 replacing at least a portion of the sacrificial material of the second series of lines with top electrode material; and 
 wherein a first memory cell material is formed within the memory cell locations prior to forming the expanse of sacrificial material, and wherein a second memory cell material is formed within the memory cell locations by replacing a portion of the sacrificial material of the second series of lines with the second memory cell material. 
 
     
     
       2. The method of  claim 1  wherein the top electrode material comprises one or more noble metals. 
     
     
       3. The method of  claim 1  wherein the top electrode material comprises one or more of platinum, copper and silver. 
     
     
       4. A method of forming a plurality of memory cells, comprising;
 forming a series of rails extending along a first direction, individual rails extending along multiple memory cell locations, the individual rails comprising bottom electrode contact material stacked over electrically conductive lines; 
 forming a series of sacrificial material lines extending along a second direction that crosses the first direction, the sacrificial material lines being directly over the memory cell locations and in physical contact with the bottom electrode contact material; 
 transferring a pattern of the sacrificial material lines into the bottom electrode contact material to singulate the bottom electrode contact material into segments associated with only single memory cell locations; 
 forming a series of dielectric lines between the sacrificial material lines, the dielectric lines extending along the second direction; 
 removing the sacrificial material lines to leave trenches between the dielectric lines, the trenches being directly over the segments of the bottom electrode contact material; 
 forming top electrode material within the trenches and over the dielectric material lines; 
 planarizing the top electrode material to remove the top electrode material from over the dielectric material lines and thereby form a plurality of top electrode lines directly over the memory cell locations and extending along the second direction; 
 forming memory cell material over the bottom electrode contact material within the memory cell locations prior to forming the top electrode material within the trenches; and 
 wherein at least some of the memory cell material is formed within the trenches. 
 
     
     
       5. The method of  claim 4  wherein the forming of the memory cell material within the trenches comprises forming planar sheets of the memory cell material along bottoms of the trenches. 
     
     
       6. The method of  claim 4  wherein the forming of the memory cell material within the trenches comprises forming upwardly opening container-shaped structures of the memory cell material. 
     
     
       7. A method of forming a plurality of memory cells, comprising:
 forming a series of rails extending along a first direction, individual rails extending along multiple memory cell locations, the individual rails comprising bottom electrode contact material stacked over electrically conductive lines, the electrically conductive lines of the individual rails being in direct physical contact with an underlying insulative material; 
 forming memory material over the series of rails; 
 after forming the memory material, forming a series of sacrificial material lines extending along a second direction that crosses the first direction, the sacrificial material lines being directly over the memory cell locations; 
 transferring a pattern of the sacrificial material lines into the bottom electrode contact material to singulate the bottom electrode contact material into segments associated with only single memory cell locations; 
 forming a series of dielectric lines between the sacrificial material lines, the dielectric lines extending along the second direction; 
 removing the sacrificial material lines to leave trenches between the dielectric lines, the trenches being directly over the segments of the bottom electrode contact material; 
 forming top electrode material within the trenches and over the dielectric material lines; 
 planarizing the top electrode material to remove the top electrode material from over the dielectric material lines and thereby form a plurality of top electrode lines directly over the memory cell locations and extending along the second direction; and 
 wherein the segments of the bottom electrode contact material are along tops of select devices. 
 
     
     
       8. The method of  claim 7  wherein the select devices are transistors. 
     
     
       9. The method of  claim 7  wherein the select devices are diodes which are singulated during the singulation of the bottom electrode contact material. 
     
     
       10. A method of forming a plurality of memory cells, comprising:
 forming a series of rails extending along a first direction, individual rails extending along multiple memory cell locations, the individual rails comprising bottom electrode contact material stacked over electrically conductive lines, the electrically conductive lines being a first series of lines; 
 forming an expanse of sacrificial material extending across the rails and in direct contact with an upper surface of the bottom electrode contact material; 
 patterning the sacrificial material into a second series of lines extending along a second direction that crosses the first direction; 
 transferring a pattern of the second series of lines into the bottom electrode contact material to singulate the bottom electrode contact material into segments associated with only single memory cell locations; the transferring of the pattern forming a first series of trenches that extends along the second direction; individual trenches of the first series being between adjacent lines of the second series; 
 forming one or more dielectric materials within the first series of trenches; 
 after forming said one or more dielectric materials, removing the sacrificial material to leave a second series of trenches that extends along the second direction; individual trenches of the second series being directly over the segments of bottom electrode contact material; 
 forming top electrode material within the second series of trenches and over the one or more dielectric materials; 
 planarizing the top electrode material to remove the top electrode material from over the one or more dielectric materials and thereby form a plurality of top electrode lines extending along the second direction; and 
 forming memory cell material within the trenches of the second series prior to forming the top electrode material within such trenches. 
 
     
     
       11. The method of  claim 10  wherein the memory cell material forms upwardly-opening containers within the trenches of the second series; and wherein the top electrode material is formed within said upwardly-opening containers. 
     
     
       12. A method of forming a plurality of memory cells, comprising:
 forming a series of rails extending along a first direction, individual rails extending along multiple memory cell locations, the individual rails comprising bottom electrode contact material stacked over electrically conductive lines, the electrically conductive lines being a first series of lines; 
 forming an expanse of sacrificial material extending across the rails; 
 patterning the sacrificial material into a second series of lines extending along a second direction that crosses the first direction; 
 transferring a pattern of the second series of lines into the bottom electrode contact material to singulate the bottom electrode contact material into segments associated with only single memory cell locations; the transferring of the pattern forming a first series of trenches that extends along the second direction; individual trenches of the first series being between adjacent lines of the second series; 
 forming one or more dielectric materials within the first series of trenches; 
 after forming said one or more dielectric materials, removing the sacrificial material to leave a second series of trenches that extends along the second direction; individual trenches of the second series being directly over the segments of bottom electrode contact material; 
 forming top electrode material within the second series of trenches and over the one or more dielectric materials; 
 planarizing the top electrode material to remove the top electrode material from over the one or more dielectric materials and thereby form a plurality of top electrode lines extending along the second direction; and 
 forming an expanse of memory cell material across the rails, and forming the expanse of sacrificial material over the expanse of memory cell material; and wherein the pattern of the second series of lines is transferred into the expanse of memory cell material. 
 
     
     
       13. The method of  claim 12  wherein the memory cell material is a first memory cell material, and further comprising forming a second memory cell material within the trenches of the second series prior to forming the top electrode material within such trenches. 
     
     
       14. The method of  claim 13  wherein the second memory cell material forms upwardly-opening containers within the trenches of the second series; and wherein the top electrode material is formed within said upwardly-opening containers.