Inventor

UPADHYAYA PARAG

US61 patents

⚠️ This page may combine multiple inventors who share the name “UPADHYAYA PARAG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UPADHYAYA PARAG

XILINX INC

Injection-controlled-locked phase-locked loop

High bandwidth CDR

Latch-based level shifter circuit with self-biasing

Continuous time linear equalization (CTLE) adaptation algorithm enabling baud-rate clock data recovery(CDR) locked to center of eye

Digital fractional-N multiplying injection locked oscillator

Phase-locked loop having sub-sampling phase detector

Resolution programmable SAR ADC

Phase interpolator and method of implementing a phase interpolator

Temperature-locked loop for optical elements having a temperature-dependent response

Phase-locked loop having sampling phase detector

Flexible wide-range and high bandwidth auxiliary clock and data recovery (CDR) circuit for transceivers

Ultra-low-power injection locked oscillator for IQ clock generation

Clock and data recovery circuit having tunable fractional-N phase locked loop

Linear gain code interleaved automatic gain control circuit

Circuits for and methods of implementing a dual-mode oscillator

Voltage controlled oscillator including MuGFETS

Circuit for and method of receiving signals in an integrated circuit device

Inductor structure with a current return encompassing a coil

Phase lock loop with injection pulse control

Transceiver for providing a clock signal

Circuits for and methods of calibrating a circuit in an integrated circuit device

Broadband in-phase and quadrature phase signal generation

Multi-phase clock signal generation circuitry

Offset circuitry and threshold reference circuitry for a capture flip-flop

Method and apparatus for a phase locked loop circuit

Delta-sigma modulator having expanded fractional input range

Circuits for and methods of implementing an inductor and a pattern ground shield in an integrated circuit

Systems and methods for providing capacitor structures in an integrated circuit

Multi-port inductors and transformers for accurately predicting voltage-controlled oscillator (VCO) frequency

Temperature-dependent phase-locked loop (PLL) reset for clock synthesizers

Reconfigurable fractional-N frequency generation for a phase-locked loop

Electrical circuits and methods to correct duty cycle error

Method for increasing active inductor operating range and peaking gain

Programmable digital sigma delta modulator

Unified low power bidirectional port

Circuits for and methods of generating a divided clock signal with a configurable phase offset

Transceiver loopback data path

Adjustable buffer circuit

Low power inverter-based CTLE

Wide frequency range voltage controlled oscillators

Wide frequency range voltage controlled oscillators

Analog-based DC offset compensation

Plesiochronous clock generation for parallel wireline transceivers

Multiple-loop symmetrical inductor

UPADHYAYA PARAG

Tunable resonant circuit in an integrated circuit

Front-end circuit with electro-static discharge protection

Resonator circuit and method of generating a resonating output signal

WU ZHAOYIN D

Interdigitated capacitor having digits of varying width

Symmetrical center tap inductor structure

KIREEV VASSILI

Inductor having a deep-well noise isolation shield