Inventor

HONG STANLEY

US72 patents

⚠️ This page may combine multiple inventors who share the name “HONG STANLEY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HONG STANLEY

SILICON STORAGE TECH INC

High precision and highly efficient tuning mechanisms and algorithms for analog neuromorphic memory in artificial neural networks

Testing circuitry and methods for analog neural memory in artificial neural network

Decoders for analog neural memory in deep learning artificial neural network

Sense amplifier circuit for reading data in a flash memory cell

Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism

Analog neural memory array storing synapsis weights in differential cell pairs in artificial neural network

Programming analog neural memory cells in deep learning artificial neural network

Configurable input blocks and output blocks and physical layout for analog neural memory in deep learning artificial neural network

Decoding system and physical layout for analog neural memory in deep learning artificial neural network

Programmable neuron for analog non-volatile memory in deep learning artificial neural network

Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural network

Analog neural memory system for deep learning neural network comprising multiple vector-by-matrix multiplication arrays and shared components

Dynamic modification of programming duration based on number of cells to be programmed in analog neural memory array in deep learning artificial neural network

Method and apparatus for high voltage generation for analog neural memory in deep learning artificial neural network

Charge pump for use in non-volatile flash memory devices

Adaptive bias decoder for non-volatile memory system

Adaptive bias decoder for non-volatile memory system

Adaptive bias decoder for non-volatile memory system

Output array neuron conversion and calibration for analog neural memory in deep learning artificial neural network

Word line and control gate line tandem decoder for analog neural memory in deep learning artificial neural network

Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system

Neural memory array storing synapsis weights in differential cell pairs

Adaptive bias decoder to provide a voltage to a control gate line in an analog neural memory array in artificial neural network

Precision tuning of a page or word of non-volatile memory cells in an analog neural memory system

Programming analog neural memory cells in deep learning artificial neural network

Set-while-verify circuit and reset-while verify circuit for resistive random access memory cells

Precision programming circuit for analog neural memory in deep learning artificial neural network

Precision tuning of a page or word of non-volatile memory cells and associated high voltage circuits for an analog neural memory array in an artificial neural network

Analog neural memory array in artificial neural network with substantially constant array source impedance with adaptive weight mapping and distributed power

Algorithms and circuitry for verifying a value stored during a programming operation of a non-volatile memory cell in an analog neural memory in deep learning artificial neural network

Current compensation block and method for programming analog neural memory in deep learning artificial neural network

Analog neural memory system for deep learning neural network comprising multiple vector-by-matrix multiplication arrays and shared components

Architectures and layouts for an array of resistive random access memory cells and read and write methods thereof

Input circuitry for analog neural memory in a deep learning artificial neural network

Neural network device

Multiple row programming operation in artificial neural network array

Read and programming decoding system for analog neural memory

Testing of analog neural memory cells in an artificial neural network

Setting levels for a programming operation in a neural network array

Decoders for analog neural memory in deep learning artificial neural network

Neural network array comprising one or more coarse cells and one or more fine cells

ILLUMINA INC

Flow cell with one or more barrier features

Flow cell with selective deposition or activation of nucleotides

Flow cell with selective deposition or activation of nucleotides

Flow cell with one or more barrier features

Flow cell with selective deposition or activation of nucleotides

System and method for storage

Storage device, system, and method

Flow cell with one or more barrier features

ATMEL CORP

Memory architecture with advanced main-bitline partitioning circuitry for enhanced erase/program/verify operations