Inventor

MANFRINI MAURICIO

TW127 patents

⚠️ This page may combine multiple inventors who share the name “MANFRINI MAURICIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MANFRINI MAURICIO

TAIWAN SEMICONDUCTOR MFG CO LTD

Ferroelectric memory device using back-end-of-line (BEOL) thin film access transistors and methods for forming the same

Spacer-defined back-end transistor as memory selector

High-density memory device with planar thin film transistor (TFT) selector and methods for making the same

Back-end-of-line selector for memory device

Ferroelectric memory device using back-end-of-line (BEOL) thin film access transistors and methods for forming the same

Polarization enhancement structure for enlarging memory window

Ferroelectric tunnel junction devices with a sparse seed layer and methods for forming the same

Semiconductor device and method for manufacturing the same

Memory devices

Crystalline semiconductor layer formed in BEOL processes

Ferroelectric memory device and method of forming the same

Semiconducting metal oxide memory device using hydrogen-mediated threshold voltage modulation and methods for forming the same

Memory cell with magnetic access selector apparatus

High-density 3D-dram cell with scaled capacitors

Tunnel junction selector MRAM

Memory cell with unipolar selectors

Crystalline semiconductor layer formed in BEOL processes

Intercalated metal/dielectric structure for nonvolatile memory devices

Thin film transistor, semiconductor device and method of fabricating thin film transistor

Semiconducting metal oxide transistors having a patterned gate and methods for forming the same

Transistors including crystalline raised active regions and methods for forming the same

Memory cell with magnetic access selector apparatus

Ferroelectric memory device using back-end-of-line (BEOL) thin film access transistors and methods for forming the same

Access transistor including a metal oxide barrier layer and methods for forming the same

Ferroelectric tunnel junction devices with a sparse seed layer and methods for forming the same

Back-end-of-line selector for memory device

Semiconductor device including first and second transistor channels

Access transistor including a metal oxide barrier layer and methods for forming the same

Three-state memory device

Transistor, semiconductor device including the same, and manufacturing method thereof

Ferroelectric memory device and method of forming the same

Semiconductor structure and method of forming the same

Memory devices

Semiconductor structure with thin film transistor

Spacer-defined back-end transistor as memory selector

Multi-gate selector switches for memory cells and methods of forming the same

Memory cell with unipolar selectors

Layered structure, semiconductor device including the same, and manufacturing method thereof

KEPLER COMPUTING INC

Memory device fabrication through wafer bonding

Multi-level hydrogen barrier layers for memory applications

Integrated via and bridge electrodes for memory array applications and methods of fabrication

Gate coupled non-linear polar material based capacitors for memory and logic

Methods of fabricating planar capacitors on a shared plate electrode

Capacitor devices with shared electrode and methods of fabrication

Drain coupled non-linear polar material based capacitors for memory and logic

Methods of fabricating trench capacitors on a shared plate electrode

Integration of 2T-NC for memory and logic applications

Planar capacitors with shared electrode and methods of fabrication

Trench capacitors with shared electrode

IMEC VZW

Magnetic majority gate device