Inventor
GOMES WILFRED
US75 patents
⚠️ This page may combine multiple inventors who share the name “GOMES WILFRED”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
49 patentsUS11335686B2May 17, 2022
Transistors with back-side contacts to create three dimensional memory and logic
INTEL CORP8 citations86
US11257822B2Feb 22, 2022
Three-dimensional nanoribbon-based dynamic random-access memory
INTEL CORP9 citations86
US11087832B1Aug 10, 2021
Three-dimensional nanoribbon-based static random-access memory
INTEL CORP18 citations86
US11018264B1May 25, 2021
Three-dimensional nanoribbon-based logic
INTEL CORP18 citations86
US11239238B2Feb 1, 2022
Thin film transistor based memory cells on both sides of a layer of logic devices
INTEL CORP13 citations85
US11056492B1Jul 6, 2021
Dense memory arrays utilizing access transistors with back-side contacts
INTEL CORP9 citations85
US11024601B2Jun 1, 2021
Hyperchip
INTEL CORP4 citations84
US12381193B2Aug 5, 2025
Integrated circuit assemblies
INTEL CORP2 citations74
US12271306B2Apr 8, 2025
Integrated three-dimensional (3D) DRAM cache
INTEL CORP3 citations74
US11894359B2Feb 6, 2024
Distributed semiconductor die and package architecture
INTEL CORP1 citations73
US11824041B2Nov 21, 2023
Hyperchip
INTEL CORP1 citations73
US11373987B2Jun 28, 2022
Device, method and system for providing a stacked arrangement of integrated circuit dies
INTEL CORP2 citations73
US11139300B2Oct 5, 2021
Three-dimensional memory arrays with layer selector transistors
INTEL CORP5 citations73
US12170273B2Dec 17, 2024
Integrated circuit assemblies with direct chip attach to circuit boards
INTEL CORP2 citations72
US11387198B2Jul 12, 2022
Device, system and method for providing inductor structures
INTEL CORP3 citations72
US10784204B2Sep 22, 2020
Rlink—die to die channel interconnect configurations to improve signaling
INTEL CORP3 citations72
US11257804B2Feb 22, 2022
Distributed semiconductor die and package architecture
INTEL CORP1 citations71
US11652060B2May 16, 2023
Die interconnection scheme for providing a high yielding process for high performance microprocessors
INTEL CORP3 citations70
US12412835B2Sep 9, 2025
Back-side power delivery with glass support at the front
INTEL CORP1 citations64
US12327809B2Jun 10, 2025
Vertically stacked and bonded memory arrays
INTEL CORP1 citations64
US12567866B2Mar 3, 2026
Digital to analog converter using high-injection velocity channel materials for low temperature signal conversion
INTEL CORP0 citations63
US12550334B2Feb 10, 2026
Memory with one access transistor for multiple hysteretic capacitors
INTEL CORP0 citations63
US12469767B2Nov 11, 2025
Integrated planar transistors and memory cell array architectures
INTEL CORP0 citations63
US12432897B2Sep 30, 2025
Cooling approaches for stitched dies
INTEL CORP1 citations63
US12406956B2Sep 2, 2025
Bilayer memory stacking with computer logic circuits shared between bottom and top memory layers
INTEL CORP0 citations63
US12310032B2May 20, 2025
Stacked backend memory with resistive switching devices
INTEL CORP0 citations63
US12197007B2Jan 14, 2025
Multi-layered optical integrated circuit assembly with a monocrystalline waveguide and lower crystallinity bonding layer
INTEL CORP0 citations63
US12147083B2Nov 19, 2024
Hybrid manufacturing for integrating photonic and electronic components
INTEL CORP1 citations63
US11749663B2Sep 5, 2023
Device, method and system for providing a stacked arrangement of integrated circuit dies
INTEL CORP0 citations63
US12572299B2Mar 10, 2026
Method and apparatus to implement an integrated circuit including both dynamic random-access memory (DRAM) and static random-access memory (SRAM)
INTEL CORP0 citations62
US12525295B2Jan 13, 2026
Two transistor memory cells with angled transistors
INTEL CORP0 citations62
US12512365B2Dec 30, 2025
Integrated circuit interconnect structures with a metal chalcogenide liner
INTEL CORP0 citations62
US12488832B2Dec 2, 2025
Embedded dynamic random-access memory (eDRAM) to operate based on data access characteristics
INTEL CORP0 citations62
US12471334B2Nov 11, 2025
Integrated circuit devices with angled transistors formed based on angled wafers
INTEL CORP0 citations62
US12471362B2Nov 11, 2025
Integrated circuit structures having ultra-high conductivity global routing
INTEL CORP0 citations62
US12355002B2Jul 8, 2025
Hyperchip
INTEL CORP0 citations62
US12327581B2Jun 10, 2025
Embedded memory IC's with power supply droop circuitry coupled to ferroelectric capacitors
INTEL CORP0 citations62
US12310001B2May 20, 2025
Decoupling capacitors and methods of fabrication
INTEL CORP1 citations62
US12278229B2Apr 15, 2025
Hybrid manufacturing for integrated circuit devices and assemblies
INTEL CORP0 citations62
US12114479B2Oct 8, 2024
Three-dimensional memory arrays with layer selector transistors
INTEL CORP0 citations62
US12074138B2Aug 27, 2024
Hyperchip
INTEL CORP0 citations62
US12058849B2Aug 6, 2024
Three-dimensional nanoribbon-based dynamic random-access memory
INTEL CORP0 citations62
US11984430B2May 14, 2024
Hyperchip
INTEL CORP0 citations62
US11901347B2Feb 13, 2024
Microelectronic package with three-dimensional (3D) monolithic memory die
INTEL CORP1 citations62
US11817442B2Nov 14, 2023
Hybrid manufacturing for integrated circuit devices and assemblies
INTEL CORP0 citations62
US11690211B2Jun 27, 2023
Thin film transistor based memory cells on both sides of a layer of logic devices
INTEL CORP0 citations62
US11569173B2Jan 31, 2023
Bridge hub tiling architecture
INTEL CORP1 citations62
US12562215B2Feb 24, 2026
Providing orthogonal subarrays in a dynamic random access memory
INTEL CORP0 citations61
US12527026B2Jan 13, 2026
Field-effect transistor with hybrid switching mechanism
INTEL CORP0 citations61
GOMES WILFRED
1 patentShowing the top 50 of 75 patents by PatentIndex Score.