Inventor

FURUYAMA TOHRU

JP53 patents

⚠️ This page may combine multiple inventors who share the name “FURUYAMA TOHRU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FURUYAMA TOHRU

TOSHIBA KK

Semiconductor memory with bypass circuit

Semiconductor memory cell

Method for testing semiconductor devices

Method of burning in a semiconductor device

Dynamic random access memory

Static random access memory including stress test circuitry

Mos dynamic semiconductor memory cell

Semiconductor memory

Semiconductor device having groups of pads which receive the same signal

Semiconductor memory device

Dynamic random access memory with complementary bit lines and capacitor common line

Dynamic random access memory

Semiconductor memory including circuitry for driving plural word lines in a test mode

Semiconductor device with power supply mode-change controller for reliability testing

Dram with (1/2)VCC precharge and selectively operable limiting circuit

Semiconductor memory

Semiconductor device with power supply voltage converter circuit

Semiconductor memory and screening test method thereof

Bias voltage generation circuit

Semiconductor memory device

Semiconductor memory and screening test method thereof

Semiconductor memory having memory cell units each including cascade-connected MOS transistors

Semiconductor memory

Dynamic semiconductor memory device

Dynamic random access memory and method for writing data thereto

Semiconductor device having a substrate bias generator

Semiconductor device having a particular structure allowing for voltage stress test application

Memory test circuit

Dynamic random access memory

Semiconductor memory and screening test method thereof

Dynamic random access memory

Clock synchronous type DRAM with latch

Dynamic random access memory

Clock synchronous type DRAM with data latch

Semiconductor memory device having a memory cell unit including a plurality of transistors connected in series

Semiconductor memory device

Semiconductor device and method of screening the same

Semiconductor memory device having a memory cell unit including a plurality of transistors connected in series

Dynamic random access memory

Method and circuitry for screening a dynamic memory device for defective circuits

Semiconductor memory device

Substrate bias generation circuit used in semiconductor integrated circuit

Dynamic random access memory

Dynamic random access memory

Memory circuit with built-in cache memory

TOKYO SHIBAURA ELECTRIC CO

Semiconductor dynamic memory device

Dynamic type semiconductor memory device

Semiconductor memory circuit

Semiconductor memory device

Semiconductor memory circuit