Inventor

HAVEMANN ROBERT H

US78 patents

⚠️ This page may combine multiple inventors who share the name “HAVEMANN ROBERT H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HAVEMANN ROBERT H

TEXAS INSTRUMENTS INC

Multilevel interconnect structure with air gaps formed between metal leads

Method of making an interconnect structure with an integrated low density dielectric

Multilevel interconnect structure with air gaps formed between metal leads

Method for forming a transistor base region under thick oxide

Variable doping of metal plugs for enhanced reliability

Porous dielectric material with a passivation layer for electronics applications

Method of fabricating a self-aligned contact using organic dielectric materials

Passivation of inlaid metallization

Integrated circuit insulator and structure using low dielectric insulator material including HSQ and fluorinated oxide

Metallization method for porous dielectrics

Multilevel interconnect structure with air gaps formed between metal leads

Process for conductors with selective deposition

Method of dual masking for selective gap fill of submicron interconnects

Interconnect structure with an integrated low density dielectric

Self-aligned via using low permittivity dielectric

Method of fabricating porous dielectric material with a passivation layer for electronics applications

Method of making thin film transistor and a silicide local interconnect

Method of making MOS VLSI semiconductor device with metal gate

Process for formation of shallow silicided junctions

Integrated circuit interconnect and method

Transistor and method

Method of forming diffusion barriers for copper metallization in integrated cirucits

Method to improve the texture of aluminum metallization

Structure with selective gap fill of submicron interconnects

Diffusion barrier trilayer for minimizing reaction between metallization layers of integrated circuits

Method of making thin film transistor and a silicide local interconnect

Method for forming integrated circuits having buried doped regions

Process for fabricating a BiCMOS integrated circuit

Bipolar transistor with a sidewall-diffused subcollector

Schottky barrier diode and method

Bicmos process for forming shallow npn emitters and mosfet source/drains

Method for forming self-aligned emitters and bases and source/drains in an integrated circuit

Method of making vertical bipolar transistor having base above buried nitride dielectric formed by deep implantation

Low pressure, low temperature, semiconductor gap filling process

Low pressure, low temperature, semiconductor gap filling process

Process of making polysilicon resistor

Polysilicon resistor structure including polysilicon contacts

Resistor structure and process

Method for integrated circuit device isolation

Interconnect capacitance between metal leads

Structure with selective gap fill of submicron interconnects

Process for reduced emitter-base capacitance in bipolar transistor

Method for forming shallow junctions with a low resistivity silicide layer

NOVELLUS SYSTEMS INC

Selective refractory metal and nitride capping

Method of fabricating low dielectric constant dielectric films

Selective refractory metal and nitride capping

Method of fabricating low dielectric constant dielectric films

Nanoparticle cap layer

Nanoparticle cap layer

Inhomogeneous materials having physical properties decoupled from desired functions