Inventor · disambiguated record
Sanjay Havanur
Also filed as: HAVANUR SANJAY
15 granted patents·107 citations·filing 2003–2021
92Inventor score
Files withALPHA & OMEGA SEMICONDUCTOR8HAVANUR SANJAY3SILICONIX INCORPORATED2SEMTECH CORP1VISHAY SILICONIX1
Top patents by PatentIndex Score
15 records- 0189US7485954B2Stacked dual MOSFET packageALPHA & OMEGA SEMICONDUCTOR·Filed 2006·Granted Feb 3, 2009·18 cites·9 claims
- 0288US7443225B2Thermally stable semiconductor power deviceALPHA & OMEGA SEMICONDUCTOR·Filed 2006·Granted Oct 28, 2008·14 cites·18 claims
- 0387US11218144B2Semiconductor device with multiple independent gatesSILICONIX INCORPORATED·Filed 2019·Granted Jan 4, 2022·4 cites·18 claims
- 0482US7495877B2Circuit configuration and method to reduce ringing in the semiconductor power switching circuitsALPHA & OMEGA SEMICONDUCTOR·Filed 2006·Granted Feb 24, 2009·11 cites·32 claims
- 0581US7671662B2Thermally stable semiconductor power deviceALPHA & OMEGA SEMICONDUCTOR·Filed 2008·Granted Mar 2, 2010·7 cites·14 claims
- 0680US10622994B2Devices and methods for driving a semiconductor switching deviceVISHAY SILICONIX·Filed 2018·Granted Apr 14, 2020·3 cites·31 claims
- 0776US6788554B2Switched mode power converter having synchronous rectification and secondary side post regulationSEMTECH CORP·Filed 2003·Granted Sep 7, 2004·33 cites·17 claims
- 0868US7999600B2Device and method for limiting Di/Dt caused by a switching FET of an inductive switching circuitALPHA & OMEGA SEMICONDUCTOR·Filed 2009·Granted Aug 16, 2011·3 cites·19 claims
- 0967US11824523B2Semiconductor device with multiple independent gatesSILICONIX INCORPORATED·Filed 2021·Granted Nov 21, 2023·0 cites·20 claims
- 1067US7876584B2Circuit and method for controlling the secondary FET of transformer coupled synchronous rectified flyback converterALPHA & OMEGA SEMICONDUCTOR·Filed 2009·Granted Jan 25, 2011·8 cites·13 claims
- 1167US7564292B2Device and method for limiting Di/Dt caused by a switching FET of an inductive switching circuitALPHA & OMEGA SEMICONDUCTOR·Filed 2007·Granted Jul 21, 2009·3 cites·20 claims
- 1265US7898831B2Device and method for limiting drain-source voltage of transformer-coupled push pull power conversion circuitALPHA & OMEGA SEMICONDUCTOR·Filed 2008·Granted Mar 1, 2011·2 cites·7 claims
- 1361US8633512B2Device and associated semiconductor package for limiting drain-source voltage of transformer-coupled push pull power conversion circuitHAVANUR SANJAY·Filed 2012·Granted Jan 21, 2014·1 cites·10 claims
- 1450US8207017B2Stacked dual MOSFET packageHAVANUR SANJAY·Filed 2008·Granted Jun 26, 2012·0 cites·9 claims
- 1547US8264861B2Device and method for limiting drain-source voltage of transformer-coupled push pull power conversion circuitHAVANUR SANJAY·Filed 2011·Granted Sep 11, 2012·0 cites·4 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →