Inventor
JOSEPH ALVIN J
US121 patents
⚠️ This page may combine multiple inventors who share the name “JOSEPH ALVIN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
34 patentsUS9349793B2May 24, 2016
Semiconductor structure with airgap
IBM33 citations98
US7999320B2Aug 16, 2011
SOI radio frequency switch with enhanced signal fidelity and electrical isolation
IBM21 citations93
US7262484B2Aug 28, 2007
Structure and method for performance improvement in vertical bipolar transistors
IBM17 citations93
US7002221B2Feb 21, 2006
Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
IBM17 citations93
US6888221B1May 3, 2005
BICMOS technology on SIMOX wafers
IBM37 citations93
US8722508B2May 13, 2014
Low harmonic RF switch in SOI
IBM23 citations92
US7119416B1Oct 10, 2006
Bipolar transistor structure with self-aligned raised extrinsic base and methods
IBM21 citations92
US7037798B2May 2, 2006
Bipolar transistor structure with self-aligned raised extrinsic base and methods
IBM26 citations92
US6869852B1Mar 22, 2005
Self-aligned raised extrinsic base bipolar transistor structure and method
IBM20 citations92
US6744079B2Jun 1, 2004
Optimized blocking impurity placement for SiGe HBTs
IBM19 citations92
US9917005B2Mar 13, 2018
Semiconductor structure with airgap
IBM3 citations84
US9633894B2Apr 25, 2017
Semiconductor structure with airgap
IBM4 citations84
US9171121B2Oct 27, 2015
Method, structure, and design structure for a through-silicon-via Wilkinson power divider
IBM12 citations84
US8716837B2May 6, 2014
Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases
IBM5 citations84
US7932541B2Apr 26, 2011
High performance collector-up bipolar transistor
IBM13 citations84
US7776704B2Aug 17, 2010
Method to build self-aligned NPN in advanced BiCMOS technology
IBM12 citations84
US7709338B2May 4, 2010
BiCMOS devices with a self-aligned emitter and methods of fabricating such BiCMOS devices
IBM14 citations84
US7501690B2Mar 10, 2009
Semiconductor ground shield method
IBM11 citations84
US7329940B2Feb 12, 2008
Semiconductor structure and method of manufacture
IBM10 citations84
US7253096B2Aug 7, 2007
Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
IBM11 citations84
US7002190B1Feb 21, 2006
Method of collector formation in BiCMOS technology
IBM12 citations84
US6967167B2Nov 22, 2005
Silicon dioxide removing method
IBM16 citations84
US7927963B2Apr 19, 2011
Integrated circuit structure, design structure, and method having improved isolation and harmonics
IBM9 citations83
US7804151B2Sep 28, 2010
Integrated circuit structure, design structure, and method having improved isolation and harmonics
IBM13 citations83
US6744112B2Jun 1, 2004
Multiple chip guard rings for integrated circuit and chip guard ring interconnect
IBM13 citations82
US7265018B2Sep 4, 2007
Method to build self-aligned NPN in advanced BiCMOS technology
IBM9 citations74
US6911681B1Jun 28, 2005
Method of base formation in a BiCMOS process
IBM5 citations74
US10692753B2Jun 23, 2020
Semiconductor structure with airgap
IBM1 citations73
US10211087B2Feb 19, 2019
Semiconductor structure with airgap
IBM2 citations73
US9666475B2May 30, 2017
Semiconductor structure with airgap
IBM2 citations73
US9530711B2Dec 27, 2016
Silicon-on-insulator heat sink
IBM4 citations73
US9059269B2Jun 16, 2015
Silicon-on-insulator heat sink
IBM4 citations73
US8963293B2Feb 24, 2015
High resistivity silicon-on-insulator substrate and method of forming
IBM4 citations73
US8951896B2Feb 10, 2015
High linearity SOI wafer for low-distortion circuit applications
IBM4 citations71
BOTULA ALAN B
6 patentsUS8674472B2Mar 18, 2014
Low harmonic RF switch in SOI
BOTULA ALAN B25 citations92
US8492868B2Jul 23, 2013
Method, apparatus, and design structure for silicon-on-insulator high-bandwidth circuitry with reduced charge layer
BOTULA ALAN B9 citations84
US8133774B2Mar 13, 2012
SOI radio frequency switch with enhanced electrical isolation
BOTULA ALAN B12 citations84
US8741739B2Jun 3, 2014
High resistivity silicon-on-insulator substrate and method of forming
BOTULA ALAN B4 citations73
US8698244B2Apr 15, 2014
Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method
BOTULA ALAN B4 citations73
US8735986B2May 27, 2014
Forming structures on resistive substrates
BOTULA ALAN B4 citations72
GLOBALFOUNDRIES INC
5 patentsUS10211146B2Feb 19, 2019
Air gap over transistor gate and related method
GLOBALFOUNDRIES INC24 citations94
US10157777B2Dec 18, 2018
Air gap over transistor gate and related method
GLOBALFOUNDRIES INC13 citations84
US9570564B2Feb 14, 2017
Self-aligned emitter-base bipolar junction transistor with reduced base resistance and base-collector capacitance
GLOBALFOUNDRIES INC8 citations80
US10367083B2Jul 30, 2019
Compact device structures for a bipolar junction transistor
GLOBALFOUNDRIES INC5 citations73
US9385022B2Jul 5, 2016
Silicon waveguide on bulk silicon substrate and methods of forming
GLOBALFOUNDRIES INC6 citations73
CAMILLO-CASTILLO RENATA
2 patentsUS8536012B2Sep 17, 2013
Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases
CAMILLO-CASTILLO RENATA13 citations84
US8405186B2Mar 26, 2013
Transistor structure with a sidewall-defined intrinsic base to extrinsic base link-up region and method of forming the structure
CAMILLO-CASTILLO RENATA7 citations83
GLOBALFOUNDRIES US INC
2 patentsADKISSON JAMES W
1 patentShowing the top 50 of 121 patents by PatentIndex Score.