Inventor · disambiguated record
Ajay Naini
Also filed as: NAINI AJAY
9 granted patents·1 pending application·220 citations·filing 1991–2004
90Inventor score
Top patents by PatentIndex Score
10 records- 0191US7328371B1Core redundancy in a chip multiprocessor for highly reliable systemsADVANCED MICRO DEVICES INC·Filed 2004·Granted Feb 5, 2008·77 cites·19 claims
- 0268US5220525ARecoded iterative multiplierMOTOROLA INC·Filed 1991·Granted Jun 15, 1993·53 cites·12 claims
- 0360US6603333B2Method and apparatus for reduction of noise sensitivity in dynamic logic circuitsFUJITSU LTD·Filed 2000·Granted Aug 5, 2003·10 cites·10 claims
- 0455US6954912B2Error detection in dynamic logic circuitsFUJITSU LTD·Filed 2002·Granted Oct 11, 2005·7 cites·28 claims
- 0553US5523961AConverting biased exponents from single/double precision to extended precision without requiring an adderCYRIX CORP·Filed 1994·Granted Jun 4, 1996·16 cites·13 claims
- 0653US5276635AMethod and apparatus for performing carry look-ahead addition in a data processorMOTOROLA INC·Filed 1993·Granted Jan 4, 1994·26 cites·10 claims
- 0748US6542423B1Read port design and method for register arrayFUJITSU LTD·Filed 2001·Granted Apr 1, 2003·6 cites·11 claims
- 0839US5265043AWallace tree multiplier array having an improved layout topologyMOTOROLA INC·Filed 1993·Granted Nov 23, 1993·15 cites·12 claims
- 0937US6209083B1Processor having selectable exception handling modesVIA CYRIX INC·Filed 1997·Granted Mar 27, 2001·10 cites·18 claims
- 1033US2003115236A1Elimination of rounding step in the short path of a floating point adderFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →