Inventor · disambiguated record
Akif Sultan
Also filed as: BULLER JAMES F · SULTAN AKIF
31 granted patents·1 pending application·380 citations·filing 1998–2013
97Inventor score
Top patents by PatentIndex Score
32 records- 0189US6365516B1Advanced cobalt silicidation with in-situ hydrogen plasma cleanADVANCED MICRO DEVICES INC·Filed 2000·Granted Apr 2, 2002·55 cites·16 claims
- 0284US8779529B2Self-aligned silicidation for replacement gate processSEN INDRADEEP·Filed 2012·Granted Jul 15, 2014·9 cites·20 claims
- 0382US7504270B2Methods of quantifying variations resulting from manufacturing-induced corner rounding of various features, and structures for testing sameADVANCED MICRO DEVICES INC·Filed 2006·Granted Mar 17, 2009·8 cites·16 claims
- 0482US5970353AReduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusionADVANCED MICRO DEVICES INC·Filed 1998·Granted Oct 19, 1999·57 cites·15 claims
- 0581US6475885B1Source/drain formation with sub-amorphizing implantationADVANCED MICRO DEVICES INC·Filed 2001·Granted Nov 5, 2002·26 cites·22 claims
- 0678US6921704B1Method for improving MOS mobilityADVANCED MICRO DEVICES INC·Filed 2003·Granted Jul 26, 2005·25 cites·20 claims
- 0776US6642536B1Hybrid silicon on insulator/bulk strained silicon technologyADVANCED MICRO DEVICES INC·Filed 2001·Granted Nov 4, 2003·23 cites·13 claims
- 0874US7633103B2Semiconductor device and methods for fabricating sameGLOBALFOUNDRIES INC·Filed 2007·Granted Dec 15, 2009·5 cites·17 claims
- 0973US8426278B2Semiconductor devices having stressor regions and related fabrication methodsSULTAN AKIF·Filed 2010·Granted Apr 23, 2013·4 cites·7 claims
- 1071US7793240B2Compensating for layout dimension effects in semiconductor device modelingADVANCED MICRO DEVICES INC·Filed 2006·Granted Sep 7, 2010·5 cites·21 claims
- 1171US6008099AFabrication process employing a single dopant implant for formation of a drain extension region and a drain region of an LDD MOSFET using enhanced lateral diffusionADVANCED MICRO DEVICES INC·Filed 1998·Granted Dec 28, 1999·39 cites·18 claims
- 1270US8076703B2Semiconductor device and methods for fabricating sameSULTAN AKIF·Filed 2009·Granted Dec 13, 2011·4 cites·19 claims
- 1370US7582493B2Distinguishing between dopant and line width variation componentsADVANCED MICRO DEVICES INC·Filed 2006·Granted Sep 1, 2009·3 cites·19 claims
- 1468US8035098B1Transistor with asymmetric silicon germanium source regionGLOBALFOUNDRIES INC·Filed 2006·Granted Oct 11, 2011·3 cites·17 claims
- 1567US6727136B1Formation of ultra-shallow depth source/drain extensions for MOS transistorsADVANCED MICRO DEVICES INC·Filed 2002·Granted Apr 27, 2004·13 cites·16 claims
- 1666US9269710B2Semiconductor devices having stressor regions and related fabrication methodsGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 23, 2016·2 cites·12 claims
- 1766US8361870B2Self-aligned silicidation for replacement gate processGLOBALFOUNDRIES INC·Filed 2010·Granted Jan 29, 2013·2 cites·15 claims
- 1866US7761838B2Method for fabricating a semiconductor device having an extended stress linerGLOBALFOUNDRIES INC·Filed 2007·Granted Jul 20, 2010·3 cites·24 claims
- 1965US6777281B1Maintaining LDD series resistance of MOS transistors by retarding dopant segregationADVANCED MICRO DEVICES INC·Filed 2002·Granted Aug 17, 2004·9 cites·15 claims
- 2065US6087209AFormation of low resistance, ultra shallow LDD junctions employing a sub-surface, non-amorphous implantADVANCED MICRO DEVICES INC·Filed 1998·Granted Jul 11, 2000·32 cites·15 claims
- 2161US6979635B1Method of forming miniaturized polycrystalline silicon gate electrodes using selective oxidationADVANCED MICRO DEVICES INC·Filed 2004·Granted Dec 27, 2005·9 cites·14 claims
- 2260US6063682AUltra-shallow p-type junction having reduced sheet resistance and method for producing shallow junctionsADVANCED MICRO DEVICES INC·Filed 1998·Granted May 16, 2000·25 cites·20 claims
- 2359US7598161B2Method of forming transistor devices with different threshold voltages using halo implant shadowingADVANCED MICRO DEVICES INC·Filed 2007·Granted Oct 6, 2009·1 cites·16 claims
- 2454US6346463B1Method for forming a semiconductor device with a tailored well profileADVANCED MICRO DEVICES INC·Filed 2000·Granted Feb 12, 2002·4 cites·12 claims
- 2553US7176095B1Bi-modal halo implantationADVANCED MICRO DEVICES INC·Filed 2004·Granted Feb 13, 2007·4 cites·12 claims
- 2649US8377781B2Transistor with asymmetric silicon germanium source regionGLOBALFOUNDRIES INC·Filed 2011·Granted Feb 19, 2013·0 cites·9 claims
- 2747US6864516B2SOI MOSFET junction degradation using multiple buried amorphous layersADVANCED MICRO DEVICES INC·Filed 2002·Granted Mar 8, 2005·1 cites·29 claims
- 2844US7638837B2Stress enhanced semiconductor device and methods for fabricating sameGLOBALFOUNDRIES INC·Filed 2007·Granted Dec 29, 2009·0 cites·17 claims
- 2943US6593623B1Reduced channel length lightly doped drain transistor using a sub-amorphous large tilt angle implant to provide enhanced lateral diffusionADVANCED MICRO DEVICES INC·Filed 1999·Granted Jul 15, 2003·9 cites·7 claims
- 3039US8687417B2Electronic device and method of biasingLI RUIGANG·Filed 2007·Granted Apr 1, 2014·0 cites·9 claims
- 3138US2007026599A1Methods for fabricating a stressed MOS deviceADVANCED MICRO DEVICES INC·Filed 2005·Application pending·0 cites
- 3234US8497179B2Method of fabricating multi-fingered semiconductor devices on a common substrateSULTAN AKIF·Filed 2010·Granted Jul 30, 2013·0 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →