Inventor · disambiguated record
Alireza Kasnavi
Also filed as: KASNAVI ALIREZA
10 granted patents·290 citations·filing 2005–2013
89Inventor score
Technology areasG06F
Top patents by PatentIndex Score
10 records- 0197US7454731B2Generation of engineering change order (ECO) constraints for use in selecting ECO repair techniquesSYNOPSYS INC·Filed 2006·Granted Nov 18, 2008·216 cites·15 claims
- 0293US8418103B2Nonlinear approach to scaling circuit behaviors for electronic design automationWANG XIN·Filed 2011·Granted Apr 9, 2013·25 cites·19 claims
- 0389US7962876B2Generation of engineering change order (ECO) constraints for use in selecting ECO repair techniquesSYNOPSYS INC·Filed 2008·Granted Jun 14, 2011·23 cites·34 claims
- 0483US7900165B2Determining a design attribute by estimation and by calibration of estimated valueSYNOPSYS INC·Filed 2007·Granted Mar 1, 2011·11 cites·18 claims
- 0576US8924906B2Determining a design attribute by estimation and by calibration of estimated valueSYNOPSYS INC·Filed 2013·Granted Dec 30, 2014·3 cites·20 claims
- 0673US7272807B2Determining equivalent waveforms for distorted waveformsSYNOPSYS INC·Filed 2005·Granted Sep 18, 2007·7 cites·19 claims
- 0762US7861198B2Distorted waveform propagation and crosstalk delay analysis using multiple cell modelsSYNOPSYS INC·Filed 2007·Granted Dec 28, 2010·2 cites·24 claims
- 0858US8145442B2Fast and accurate estimation of gate output loadingLI HONG·Filed 2009·Granted Mar 27, 2012·1 cites·24 claims
- 0957US8478573B2Modeling circuit cells for waveform propagationDING LI·Filed 2005·Granted Jul 2, 2013·1 cites·19 claims
- 1047US8341574B2Crosstalk time-delay analysis using random variablesGANDIKOTA RAVIKISHORE·Filed 2009·Granted Dec 25, 2012·1 cites·22 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →