Inventor · disambiguated record
Alberto Mandler
Also filed as: MANDLER ALBERTO · MANDLER ALBERTO R · MANDLER ALBERTO RODRIGO
14 granted patents·7 pending applications·51 citations·filing 2004–2020
89Inventor score
Top patents by PatentIndex Score
21 records- 0192US9208066B1Run-time code parallelization with approximate monitoring of instruction sequencesCENTIPEDE SEMI LTD·Filed 2015·Granted Dec 8, 2015·13 cites·30 claims
- 0291US9135015B1Run-time code parallelization with monitoring of repetitive instruction sequences during branch mis-predictionCENTIPEDE SEMI LTD·Filed 2014·Granted Sep 15, 2015·14 cites·30 claims
- 0388US9348595B1Run-time code parallelization with continuous monitoring of repetitive instruction sequencesCENTIPEDE SEMI LTD·Filed 2014·Granted May 24, 2016·13 cites·20 claims
- 0481US9715390B2Run-time parallelization of code execution based on an approximate register-access specificationCENTIPEDE SEMI LTD·Filed 2015·Granted Jul 25, 2017·3 cites·27 claims
- 0576US12351216B2Coupling between moving cars of a transportation systemDIRECTRAINS LTD·Filed 2020·Granted Jul 8, 2025·1 cites·18 claims
- 0676US11873018B2Non-stop transportation systemDIRECTRAINS LTD·Filed 2020·Granted Jan 16, 2024·1 cites·20 claims
- 0773US10296350B2Parallelized execution of instruction sequencesCENTIPEDE SEMI LTD·Filed 2015·Granted May 21, 2019·2 cites·42 claims
- 0870US9430244B1Run-time code parallelization using out-of-order renaming with pre-allocation of physical registersCENTIPEDE SEMI LTD·Filed 2015·Granted Aug 30, 2016·2 cites·28 claims
- 0962US9858075B2Run-time code parallelization with independent speculative committing of instructions per segmentCENTIPEDE SEMI LTD·Filed 2015·Granted Jan 2, 2018·1 cites·32 claims
- 1056US7392346B2Memory updater using a control array to defer memory operationsANALOG DEVICES INC·Filed 2006·Granted Jun 24, 2008·1 cites·8 claims
- 1152US2017277544A1Run-Time Code Parallelization with Monitoring of Repetitive Instruction Sequences During Branch Mis-PredictionCENTIPEDE SEMI LTD·Filed 2017·Application pending·0 cites
- 1249US2018129505A1Run-Time Parallelization of Code Execution Based on an Approximate Register-Access SpecificationCENTIPEDE SEMI LTD·Filed 2016·Application pending·0 cites
- 1344US10013255B2Hardware-based run-time mitigation of conditional branchesCENTIPEDE SEMI LTD·Filed 2016·Granted Jul 3, 2018·0 cites·36 claims
- 1443US10452400B2Multi-thread processor with multi-bank branch-target bufferCENTIPEDE SEMI LTD·Filed 2018·Granted Oct 22, 2019·0 cites·22 claims
- 1543US10180841B2Early termination of segment monitoring in run-time code parallelizationCENTIPEDE SEMI LTD·Filed 2016·Granted Jan 15, 2019·0 cites·20 claims
- 1642US2005198439A1Cache memory prefetcherFiled 2004·Application pending·0 cites
- 1742US2005198442A1Conditionally accessible cache memoryFiled 2004·Application pending·0 cites
- 1839US2017337062A1Single-thread speculative multi-threadingCENTIPEDE SEMI LTD·Filed 2016·Application pending·0 cites
- 1939US2018095766A1Flushing in a parallelized processorCENTIPEDE SEMI LTD·Filed 2016·Application pending·0 cites
- 2038US10296346B2Parallelized execution of instruction sequences based on pre-monitoringCENTIPEDE SEMI LTD·Filed 2015·Granted May 21, 2019·0 cites·26 claims
- 2136US2017277538A1Speculative multi-threading trace predictionCENTIPEDE SEMI LTD·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →