Inventor · disambiguated record
Alexander John Wakefield
Also filed as: WAKEFIELD ALEXANDER · Wakefield Alexander John
13 granted patents·1 pending application·13 citations·filing 2014–2024
85Inventor score
Technology areasG06F
Files withSYNOPSYS INC14
Top patents by PatentIndex Score
14 records- 0192US11334700B1Comprehensive thermal mapping of an electronic circuit design through design simulationSYNOPSYS INC·Filed 2020·Granted May 17, 2022·4 cites·20 claims
- 0286US11003819B1Method to enable multiple users of embedded-software debug to share a single hardware resourceSYNOPSYS INC·Filed 2019·Granted May 11, 2021·5 cites·18 claims
- 0373US12001317B2Waveform based reconstruction for emulationSYNOPSYS INC·Filed 2023·Granted Jun 4, 2024·0 cites·20 claims
- 0472US10621296B1Generating SAIF efficiently from hardware platformsSYNOPSYS INC·Filed 2018·Granted Apr 14, 2020·2 cites·16 claims
- 0567US11726899B2Waveform based reconstruction for emulationSYNOPSYS INC·Filed 2021·Granted Aug 15, 2023·0 cites·20 claims
- 0662US9727678B2Graphical view and debug for coverage-point negative hintSYNOPSYS INC·Filed 2014·Granted Aug 8, 2017·2 cites·20 claims
- 0758US11493971B2Power estimation systemSYNOPSYS INC·Filed 2021·Granted Nov 8, 2022·0 cites·19 claims
- 0855US11200149B2Waveform based reconstruction for emulationSYNOPSYS INC·Filed 2017·Granted Dec 14, 2021·0 cites·20 claims
- 0952US10235483B2Capturing time-slice of emulation data for offline embedded software debugSYNOPSYS INC·Filed 2018·Granted Mar 19, 2019·0 cites·20 claims
- 1052US2025028888A1Waveform calculation using hybrid evaluation and simulation approachSYNOPSYS INC·Filed 2024·Application pending·0 cites
- 1151US11443087B2System and method for power analysis for design logic circuit with irregular clockSYNOPSYS INC·Filed 2020·Granted Sep 13, 2022·0 cites·20 claims
- 1249US10606977B2Graphical view and debug for coverage-point negative hintSYNOPSYS INC·Filed 2017·Granted Mar 31, 2020·0 cites·15 claims
- 1348US10073932B2Capturing time-slice of emulation data for offline embedded software debugSYNOPSYS INC·Filed 2017·Granted Sep 11, 2018·0 cites·18 claims
- 1442US11907630B1Power validation based on power assertion specificationSYNOPSYS INC·Filed 2020·Granted Feb 20, 2024·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →